};
static void sifive_spi_prep_device(struct sifive_spi *spi,
- struct dm_spi_slave_platdata *slave_plat)
+ struct dm_spi_slave_plat *slave_plat)
{
/* Update the chip select polarity */
if (slave_plat->mode & SPI_CS_HIGH)
}
static int sifive_spi_set_cs(struct sifive_spi *spi,
- struct dm_spi_slave_platdata *slave_plat)
+ struct dm_spi_slave_plat *slave_plat)
{
u32 cs_mode = SIFIVE_SPI_CSMODE_MODE_HOLD;
}
static void sifive_spi_prep_transfer(struct sifive_spi *spi,
- struct dm_spi_slave_platdata *slave_plat,
+ struct dm_spi_slave_plat *slave_plat,
u8 *rx_ptr)
{
u32 cr;
{
struct udevice *bus = dev->parent;
struct sifive_spi *spi = dev_get_priv(bus);
- struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+ struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
const u8 *tx_ptr = dout;
u8 *rx_ptr = din;
u32 remaining_len;