struct uart_port *port = &ourport->port;
struct s3c2410_uartcfg *cfg;
struct resource *res;
+ int ret;
dbg("s3c24xx_serial_init_port: port=%p, platdev=%p\n", port, platdev);
port->mapbase = res->start;
port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART);
- port->irq = platform_get_irq(platdev, 0);
- if (port->irq < 0)
+ ret = platform_get_irq(platdev, 0);
+ if (ret < 0)
port->irq = 0;
+ else
+ port->irq = ret;
ourport->clk = clk_get(&platdev->dev, "uart");
ourport = &s3c24xx_serial_ports[probe_index];
probe_index++;
- dbg("%s: initialising port %p...\n", __FUNCTION__, ourport);
+ dbg("%s: initialising port %p...\n", __func__, ourport);
ret = s3c24xx_serial_init_port(ourport, info, dev);
if (ret < 0)
goto probe_err;
- dbg("%s: adding port\n", __FUNCTION__);
+ dbg("%s: adding port\n", __func__);
uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
platform_set_drvdata(dev, &ourport->port);
unsigned long ucon = rd_regl(port, S3C2410_UCON);
dbg("%s: port=%p (%08lx), cfg=%p\n",
- __FUNCTION__, port, port->mapbase, cfg);
+ __func__, port, port->mapbase, cfg);
/* ensure we don't change the clock settings... */
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
MODULE_DESCRIPTION("Samsung S3C2410/S3C2440/S3C2412 Serial port driver");
+MODULE_ALIAS("platform:s3c2400-uart");
+MODULE_ALIAS("platform:s3c2410-uart");
+MODULE_ALIAS("platform:s3c2412-uart");
+MODULE_ALIAS("platform:s3c2440-uart");