PCI: determine CLS more intelligently

[pandora-kernel.git] / drivers / pci / quirks.c

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 245d2cd..1812ae7 100644 (file)
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2595,9 +2595,37 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
 static int __init pci_apply_final_quirks(void)
 {
        struct pci_dev *dev = NULL;
+       u8 cls = 0;
+       u8 tmp;
+
+       if (pci_cache_line_size)
+               printk(KERN_DEBUG "PCI: CLS %u bytes\n",
+                      pci_cache_line_size << 2);
 
        while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
                pci_fixup_device(pci_fixup_final, dev);
+               /*
+                * If arch hasn't set it explicitly yet, use the CLS
+                * value shared by all PCI devices.  If there's a
+                * mismatch, fall back to the default value.
+                */
+               if (!pci_cache_line_size) {
+                       pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &tmp);
+                       if (!cls)
+                               cls = tmp;
+                       if (!tmp || cls == tmp)
+                               continue;
+
+                       printk(KERN_DEBUG "PCI: CLS mismatch (%u != %u), "
+                              "using %u bytes\n", cls << 2, tmp << 2,
+                              pci_dfl_cache_line_size << 2);
+                       pci_cache_line_size = pci_dfl_cache_line_size;
+               }
+       }
+       if (!pci_cache_line_size) {
+               printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n",
+                      cls << 2, pci_dfl_cache_line_size << 2);
+               pci_cache_line_size = cls;
        }
 
        return 0;