phy: Add LSI ET1011C PHY driver

[pandora-kernel.git] / drivers / parisc / lba_pci.c

diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index 5eace9e..a28c894 100644 (file)
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -377,12 +377,12 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
                /* original - Generate config cycle on broken elroy
                  with risk we will miss PCI bus errors. */
                *data = lba_rd_cfg(d, tok, pos, size);
-               DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __FUNCTION__, tok, pos, *data);
+               DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __func__, tok, pos, *data);
                return 0;
        }
 
        if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->secondary, devfn, d)) {
-               DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __FUNCTION__, tok, pos);
+               DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __func__, tok, pos);
                /* either don't want to look or know device isn't present. */
                *data = ~0U;
                return(0);
@@ -398,7 +398,7 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
        case 2: *data = READ_REG16(data_reg + (pos & 2)); break;
        case 4: *data = READ_REG32(data_reg); break;
        }
-       DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __FUNCTION__, tok, pos, *data);
+       DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __func__, tok, pos, *data);
        return 0;
 }
 
@@ -441,16 +441,16 @@ static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int
        if (!LBA_SKIP_PROBE(d)) {
                /* Original Workaround */
                lba_wr_cfg(d, tok, pos, (u32) data, size);
-               DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __FUNCTION__, tok, pos,data);
+               DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __func__, tok, pos,data);
                return 0;
        }
 
        if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->secondary, devfn, d))) {
-               DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __FUNCTION__, tok, pos,data);
+               DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __func__, tok, pos,data);
                return 1; /* New Workaround */
        }
 
-       DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __FUNCTION__, tok, pos, data);
+       DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __func__, tok, pos, data);
 
        /* Basic Algorithm */
        LBA_CFG_ADDR_SETUP(d, tok | pos);
@@ -521,7 +521,7 @@ static int mercury_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, i
        if ((pos > 255) || (devfn > 255))
                return -EINVAL;
 
-       DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __FUNCTION__, tok, pos, data);
+       DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __func__, tok, pos, data);
 
        LBA_CFG_TR4_ADDR_SETUP(d, tok | pos);
        switch(size) {
@@ -768,9 +768,13 @@ lba_fixup_bus(struct pci_bus *bus)
                                DBG("lba_fixup_bus() WTF? 0x%lx [%lx/%lx] XXX",
                                        res->flags, res->start, res->end);
                        }
-                       if ((i != PCI_ROM_RESOURCE) ||
-                           (res->flags & IORESOURCE_ROM_ENABLE))
-                               pci_claim_resource(dev, i);
+
+                       /*
+                       ** FIXME: this will result in whinging for devices
+                       ** that share expansion ROMs (think quad tulip), but
+                       ** isn't harmful.
+                       */
+                       pci_claim_resource(dev, i);
                }
 
 #ifdef FBB_SUPPORT
@@ -886,7 +890,7 @@ LBA_PORT_IN(32, 0)
 #define LBA_PORT_OUT(size, mask) \
 static void lba_astro_out##size (struct pci_hba_data *d, u16 addr, u##size val) \
 { \
-       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, d, addr, val); \
+       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, d, addr, val); \
        WRITE_REG##size(val, astro_iop_base + addr); \
        if (LBA_DEV(d)->hw_rev < 3) \
                lba_t32 = READ_U32(d->base_addr + LBA_FUNC_ID); \
@@ -928,7 +932,7 @@ static struct pci_port_ops lba_astro_port_ops = {
 static u##size lba_pat_in##size (struct pci_hba_data *l, u16 addr) \
 { \
        u##size t; \
-       DBG_PORT("%s(0x%p, 0x%x) ->", __FUNCTION__, l, addr); \
+       DBG_PORT("%s(0x%p, 0x%x) ->", __func__, l, addr); \
        t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \
        DBG_PORT(" 0x%x\n", t); \
        return (t); \
@@ -944,7 +948,7 @@ LBA_PORT_IN(32, 0)
 static void lba_pat_out##size (struct pci_hba_data *l, u16 addr, u##size val) \
 { \
        void __iomem *where = PIOP_TO_GMMIO(LBA_DEV(l), addr); \
-       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, l, addr, val); \
+       DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, l, addr, val); \
        WRITE_REG##size(val, where); \
        /* flush the I/O down to the elroy at least */ \
        lba_t32 = READ_U32(l->base_addr + LBA_FUNC_ID); \
@@ -1580,7 +1584,7 @@ void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
        WARN_ON((ibase & 0x001fffff) != 0);
        WARN_ON((imask & 0x001fffff) != 0);
        
-       DBG("%s() ibase 0x%x imask 0x%x\n", __FUNCTION__, ibase, imask);
+       DBG("%s() ibase 0x%x imask 0x%x\n", __func__, ibase, imask);
        WRITE_REG32( imask, base_addr + LBA_IMASK);
        WRITE_REG32( ibase, base_addr + LBA_IBASE);
        iounmap(base_addr);