ath9k_hw: distinguish single-chip solutions on initial probe print

[pandora-kernel.git] / drivers / net / wireless / ath / ath9k / hw.h

diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 53ffe2a..33a5aec 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -33,13 +33,18 @@
 #include "../debug.h"
 
 #define ATHEROS_VENDOR_ID      0x168c
+
 #define AR5416_DEVID_PCI       0x0023
 #define AR5416_DEVID_PCIE      0x0024
 #define AR9160_DEVID_PCI       0x0027
 #define AR9280_DEVID_PCI       0x0029
 #define AR9280_DEVID_PCIE      0x002a
 #define AR9285_DEVID_PCIE      0x002b
+
 #define AR5416_AR9100_DEVID    0x000b
+
+#define AR9271_USB             0x9271
+
 #define        AR_SUBVENDOR_ID_NOG     0x0e11
 #define AR_SUBVENDOR_ID_NEW_A  0x7065
 #define AR5416_MAGIC           0x19641014
@@ -51,6 +56,12 @@
 #define AT9285_COEX3WIRE_SA_SUBSYSID   0x30aa
 #define AT9285_COEX3WIRE_DA_SUBSYSID   0x30ab
 
+#define ATH_AMPDU_LIMIT_MAX        (64 * 1024 - 1)
+
+#define        ATH_DEFAULT_NOISE_FLOOR -95
+
+#define ATH9K_RSSI_BAD                 0x80
+
 /* Register read/write primitives */
 #define REG_WRITE(_ah, _reg, _val) \
        ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg))
@@ -96,7 +107,7 @@
 #define AR_GPIO_BIT(_gpio)          (1 << (_gpio))
 
 #define BASE_ACTIVATE_DELAY         100
-#define RTC_PLL_SETTLE_DELAY        1000
+#define RTC_PLL_SETTLE_DELAY        100
 #define COEF_SCALE_S                24
 #define HT40_CHANNEL_CENTER_SHIFT   10
 
@@ -439,7 +450,6 @@ struct ath_gen_timer_table {
 
 struct ath_hw {
        struct ieee80211_hw *hw;
-       struct ath_softc *ah_sc;
        struct ath_common common;
        struct ath9k_hw_version hw_version;
        struct ath9k_ops_config config;
@@ -586,6 +596,8 @@ struct ath_hw {
        struct ar5416IniArray iniModesAdditional;
        struct ar5416IniArray iniModesRxGain;
        struct ar5416IniArray iniModesTxGain;
+       struct ar5416IniArray iniCckfirNormal;
+       struct ar5416IniArray iniCckfirJapan2484;
 
        u32 intr_gen_timer_trigger;
        u32 intr_gen_timer_thresh;
@@ -662,7 +674,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
 void ath9k_hw_reset_tsf(struct ath_hw *ah);
 void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
 bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us);
-void ath9k_hw_set11nmac2040(struct ath_hw *ah, enum ath9k_ht_macmode mode);
+void ath9k_hw_set11nmac2040(struct ath_hw *ah);
 void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
 void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
                                    const struct ath9k_beacon_state *bs);
@@ -692,6 +704,8 @@ void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer);
 void ath_gen_timer_isr(struct ath_hw *hw);
 u32 ath9k_hw_gettsf32(struct ath_hw *ah);
 
+void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len);
+
 #define ATH_PCIE_CAP_LINK_CTRL 0x70
 #define ATH_PCIE_CAP_LINK_L0S  1
 #define ATH_PCIE_CAP_LINK_L1   2