ath9k_hw: clean up tx power handling

[pandora-kernel.git] / drivers / net / wireless / ath / ath9k / eeprom.h

diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index bd82447..909a224 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008-2009 Atheros Communications Inc.
+ * Copyright (c) 2008-2011 Atheros Communications Inc.
  *
  * Permission to use, copy, modify, and/or distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
@@ -104,16 +104,11 @@
 #define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \
                                 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
 
-#define AR_EEPROM_RFSILENT_GPIO_SEL     0x001c
-#define AR_EEPROM_RFSILENT_GPIO_SEL_S   2
-#define AR_EEPROM_RFSILENT_POLARITY     0x0002
-#define AR_EEPROM_RFSILENT_POLARITY_S   1
-
 #define EEP_RFSILENT_ENABLED        0x0001
 #define EEP_RFSILENT_ENABLED_S      0
 #define EEP_RFSILENT_POLARITY       0x0002
 #define EEP_RFSILENT_POLARITY_S     1
-#define EEP_RFSILENT_GPIO_SEL       0x001c
+#define EEP_RFSILENT_GPIO_SEL       (AR_SREV_9480(ah) ? 0x00fc : 0x001c)
 #define EEP_RFSILENT_GPIO_SEL_S     2
 
 #define AR5416_OPFLAGS_11A           0x01
@@ -253,7 +248,9 @@ enum eeprom_param {
        EEP_PAPRD,
        EEP_MODAL_VER,
        EEP_ANT_DIV_CTL1,
-       EEP_CHAIN_MASK_REDUCE
+       EEP_CHAIN_MASK_REDUCE,
+       EEP_ANTENNA_GAIN_2G,
+       EEP_ANTENNA_GAIN_5G
 };
 
 enum ar5416_rates {
@@ -436,7 +433,11 @@ struct modal_eep_4k_header {
        u8 db2_2:4, db2_3:4;
        u8 db2_4:4, reserved:4;
 #endif
-       u8 futureModal[4];
+       u8 tx_diversity;
+       u8 flc_pwr_thresh;
+       u8 bb_scale_smrt_antenna;
+#define EEP_4K_BB_DESIRED_SCALE_MASK   0x1f
+       u8 futureModal[1];
        struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
 } __packed;
 
@@ -645,14 +646,15 @@ struct eeprom_ops {
        int (*check_eeprom)(struct ath_hw *hw);
        u32 (*get_eeprom)(struct ath_hw *hw, enum eeprom_param param);
        bool (*fill_eeprom)(struct ath_hw *hw);
+       u32 (*dump_eeprom)(struct ath_hw *hw, bool dump_base_hdr, u8 *buf,
+                          u32 len, u32 size);
        int (*get_eeprom_ver)(struct ath_hw *hw);
        int (*get_eeprom_rev)(struct ath_hw *hw);
        void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan);
        void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
        void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
                           u16 cfgCtl, u8 twiceAntennaReduction,
-                          u8 twiceMaxRegulatoryPower, u8 powerLimit,
-                          bool test);
+                          u8 powerLimit, bool test);
        u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);
 };