struct dmae_command *dmae)
{
u32 *wb_comp = bnx2x_sp(bp, wb_comp);
- int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 40;
+ int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 4000;
int rc = 0;
DP(BNX2X_MSG_OFF, "data before [0x%08x 0x%08x 0x%08x 0x%08x]\n",
u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param)
{
int mb_idx = BP_FW_MB_IDX(bp);
- u32 seq = ++bp->fw_seq;
+ u32 seq;
u32 rc = 0;
u32 cnt = 1;
u8 delay = CHIP_REV_IS_SLOW(bp) ? 100 : 10;
mutex_lock(&bp->fw_mb_mutex);
+ seq = ++bp->fw_seq;
SHMEM_WR(bp, func_mb[mb_idx].drv_mb_param, param);
SHMEM_WR(bp, func_mb[mb_idx].drv_mb_header, (command | seq));
union event_ring_elem *elem)
{
if (!bp->cnic_eth_dev.starting_cid ||
- cid < bp->cnic_eth_dev.starting_cid)
+ (cid < bp->cnic_eth_dev.starting_cid &&
+ cid != bp->cnic_eth_dev.iscsi_l2_cid))
return 1;
DP(BNX2X_MSG_SP, "got delete ramrod for CNIC CID %d\n", cid);
msleep(MCP_ONE_TIMEOUT);
}
-static int bnx2x_reset_mcp_comp(struct bnx2x *bp, u32 magic_val)
+/*
+ * initializes bp->common.shmem_base and waits for validity signature to appear
+ */
+static int bnx2x_init_shmem(struct bnx2x *bp)
{
- u32 shmem, cnt, validity_offset, val;
- int rc = 0;
-
- msleep(100);
+ int cnt = 0;
+ u32 val = 0;
- /* Get shmem offset */
- shmem = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR);
- if (shmem == 0) {
- BNX2X_ERR("Shmem 0 return failure\n");
- rc = -ENOTTY;
- goto exit_lbl;
- }
+ do {
+ bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR);
+ if (bp->common.shmem_base) {
+ val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]);
+ if (val & SHR_MEM_VALIDITY_MB)
+ return 0;
+ }
- validity_offset = offsetof(struct shmem_region, validity_map[0]);
+ bnx2x_mcp_wait_one(bp);
- /* Wait for MCP to come up */
- for (cnt = 0; cnt < (MCP_TIMEOUT / MCP_ONE_TIMEOUT); cnt++) {
- /* TBD: its best to check validity map of last port.
- * currently checks on port 0.
- */
- val = REG_RD(bp, shmem + validity_offset);
- DP(NETIF_MSG_HW, "shmem 0x%x validity map(0x%x)=0x%x\n", shmem,
- shmem + validity_offset, val);
+ } while (cnt++ < (MCP_TIMEOUT / MCP_ONE_TIMEOUT));
- /* check that shared memory is valid. */
- if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
- == (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
- break;
+ BNX2X_ERR("BAD MCP validity signature\n");
- bnx2x_mcp_wait_one(bp);
- }
-
- DP(NETIF_MSG_HW, "Cnt=%d Shmem validity map 0x%x\n", cnt, val);
+ return -ENODEV;
+}
- /* Check that shared memory is valid. This indicates that MCP is up. */
- if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) !=
- (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) {
- BNX2X_ERR("Shmem signature not present. MCP is not up !!\n");
- rc = -ENOTTY;
- goto exit_lbl;
- }
+static int bnx2x_reset_mcp_comp(struct bnx2x *bp, u32 magic_val)
+{
+ int rc = bnx2x_init_shmem(bp);
-exit_lbl:
/* Restore the `magic' bit value */
if (!CHIP_IS_E1(bp))
bnx2x_clp_reset_done(bp, magic_val);
BNX2X_DEV_INFO("flash_size 0x%x (%d)\n",
bp->common.flash_size, bp->common.flash_size);
- bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR);
+ bnx2x_init_shmem(bp);
+
bp->common.shmem2_base = REG_RD(bp, (BP_PATH(bp) ?
MISC_REG_GENERIC_CR_1 :
MISC_REG_GENERIC_CR_0));
+
bp->link_params.shmem_base = bp->common.shmem_base;
bp->link_params.shmem2_base = bp->common.shmem2_base;
BNX2X_DEV_INFO("shmem offset 0x%x shmem2 offset 0x%x\n",
return;
}
- val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]);
- if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
- != (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
- BNX2X_ERR("BAD MCP validity signature\n");
-
bp->common.hw_config = SHMEM_RD(bp, dev_info.shared_hw_config.config);
BNX2X_DEV_INFO("hw_config 0x%08x\n", bp->common.hw_config);