Merge branch 'topic/hda' into for-linus

[pandora-kernel.git] / drivers / mtd / nand / davinci_nand.c

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 4bedd8d..02700f7 100644 (file)
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -33,25 +33,11 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 
-#include <mach/cpu.h>
 #include <mach/nand.h>
 
 #include <asm/mach-types.h>
 
 
-#ifdef CONFIG_MTD_PARTITIONS
-static inline int mtd_has_partitions(void) { return 1; }
-#else
-static inline int mtd_has_partitions(void) { return 0; }
-#endif
-
-#ifdef CONFIG_MTD_CMDLINE_PARTS
-static inline int mtd_has_cmdlinepart(void) { return 1; }
-#else
-static inline int mtd_has_cmdlinepart(void) { return 0; }
-#endif
-
-
 /*
  * This is a device driver for the NAND flash controller found on the
  * various DaVinci family chips.  It handles up to four SoC chipselects,
@@ -357,6 +343,8 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
        info->mtd.name          = dev_name(&pdev->dev);
        info->mtd.owner         = THIS_MODULE;
 
+       info->mtd.dev.parent    = &pdev->dev;
+
        info->chip.IO_ADDR_R    = vaddr;
        info->chip.IO_ADDR_W    = vaddr;
        info->chip.chip_delay   = 0;
@@ -392,8 +380,6 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
        /* use board-specific ECC config; else, the best available */
        if (pdata)
                ecc_mode = pdata->ecc_mode;
-       else if (cpu_is_davinci_dm355())
-               ecc_mode = NAND_ECC_HW_SYNDROME;
        else
                ecc_mode = NAND_ECC_HW;
 
@@ -421,16 +407,17 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
        }
        info->chip.ecc.mode = ecc_mode;
 
-       info->clk = clk_get(&pdev->dev, "AEMIFCLK");
+       info->clk = clk_get(&pdev->dev, "aemif");
        if (IS_ERR(info->clk)) {
                ret = PTR_ERR(info->clk);
-               dev_dbg(&pdev->dev, "unable to get AEMIFCLK, err %d\n", ret);
+               dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
                goto err_clk;
        }
 
        ret = clk_enable(info->clk);
        if (ret < 0) {
-               dev_dbg(&pdev->dev, "unable to enable AEMIFCLK, err %d\n", ret);
+               dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
+                       ret);
                goto err_clk_enable;
        }