Pull acpi_bus_register_driver into release branch

[pandora-kernel.git] / drivers / mmc / mmci.c

diff --git a/drivers/mmc/mmci.c b/drivers/mmc/mmci.c
index 57375bc..da8e4d7 100644 (file)
--- a/drivers/mmc/mmci.c
+++ b/drivers/mmc/mmci.c
@@ -20,24 +20,21 @@
 #include <linux/mmc/host.h>
 #include <linux/mmc/protocol.h>
 #include <linux/amba/bus.h>
+#include <linux/clk.h>
 
+#include <asm/cacheflush.h>
 #include <asm/div64.h>
 #include <asm/io.h>
 #include <asm/scatterlist.h>
 #include <asm/sizes.h>
-#include <asm/hardware/clock.h>
 #include <asm/mach/mmc.h>
 
 #include "mmci.h"
 
 #define DRIVER_NAME "mmci-pl18x"
 
-#ifdef CONFIG_MMC_DEBUG
 #define DBG(host,fmt,args...)  \
        pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
-#else
-#define DBG(host,fmt,args...)  do { } while (0)
-#endif
 
 static unsigned int fmax = 515633;
 
@@ -96,6 +93,13 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
        if (data->flags & MMC_DATA_READ) {
                datactrl |= MCI_DPSM_DIRECTION;
                irqmask = MCI_RXFIFOHALFFULLMASK;
+
+               /*
+                * If we have less than a FIFOSIZE of bytes to transfer,
+                * trigger a PIO interrupt as soon as any data is available.
+                */
+               if (host->size < MCI_FIFOSIZE)
+                       irqmask |= MCI_RXDATAAVLBLMASK;
        } else {
                /*
                 * We don't actually need to include "FIFO empty" here
@@ -123,15 +127,10 @@ mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
        }
 
        c |= cmd->opcode | MCI_CPSM_ENABLE;
-       switch (cmd->flags & MMC_RSP_MASK) {
-       case MMC_RSP_NONE:
-       default:
-               break;
-       case MMC_RSP_LONG:
-               c |= MCI_CPSM_LONGRSP;
-       case MMC_RSP_SHORT:
+       if (cmd->flags & MMC_RSP_PRESENT) {
+               if (cmd->flags & MMC_RSP_136)
+                       c |= MCI_CPSM_LONGRSP;
                c |= MCI_CPSM_RESPONSE;
-               break;
        }
        if (/*interrupt*/0)
                c |= MCI_CPSM_INTERRUPT;
@@ -157,6 +156,13 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
                else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
                        data->error = MMC_ERR_FIFO;
                status |= MCI_DATAEND;
+
+               /*
+                * We hit an error condition.  Ensure that any data
+                * partially written to a page is properly coherent.
+                */
+               if (host->sg_len && data->flags & MMC_DATA_READ)
+                       flush_dcache_page(host->sg_ptr->page);
        }
        if (status & MCI_DATAEND) {
                mmci_stop_data(host);
@@ -292,7 +298,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id, struct pt_regs *regs)
                /*
                 * Unmap the buffer.
                 */
-               mmci_kunmap_atomic(host, &flags);
+               mmci_kunmap_atomic(host, buffer, &flags);
 
                host->sg_off += len;
                host->size -= len;
@@ -301,6 +307,13 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id, struct pt_regs *regs)
                if (remain)
                        break;
 
+               /*
+                * If we were reading, and we have completed this
+                * page, ensure that the data cache is coherent.
+                */
+               if (status & MCI_RXACTIVE)
+                       flush_dcache_page(host->sg_ptr->page);
+
                if (!mmci_next_sg(host))
                        break;
 
@@ -389,9 +402,6 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
        struct mmci_host *host = mmc_priv(mmc);
        u32 clk = 0, pwr = 0;
 
-       DBG(host, "clock %uHz busmode %u powermode %u Vdd %u\n",
-           ios->clock, ios->bus_mode, ios->power_mode, ios->vdd);
-
        if (ios->clock) {
                if (ios->clock >= host->mclk) {
                        clk = MCI_CLK_BYPASS;