.host_reset = host_reset,
};
-static struct hpsb_address_ops map_ops = {
+const static struct hpsb_address_ops map_ops = {
.read = read_maps,
};
-static struct hpsb_address_ops fcp_ops = {
+const static struct hpsb_address_ops fcp_ops = {
.write = write_fcp,
};
-static struct hpsb_address_ops reg_ops = {
+const static struct hpsb_address_ops reg_ops = {
.read = read_regs,
.write = write_regs,
.lock = lock_regs,
.lock64 = lock64_regs,
};
-static struct hpsb_address_ops config_rom_ops = {
+const static struct hpsb_address_ops config_rom_ops = {
.read = read_config_rom,
};
host->csr.state &= ~0x100;
}
- host->csr.topology_map[1] =
- cpu_to_be32(be32_to_cpu(host->csr.topology_map[1]) + 1);
+ be32_add_cpu(&host->csr.topology_map[1], 1);
host->csr.topology_map[2] = cpu_to_be32(host->node_count << 16
| host->selfid_count);
host->csr.topology_map[0] =
| csr_crc16(host->csr.topology_map + 1,
host->selfid_count + 2));
- host->csr.speed_map[1] =
- cpu_to_be32(be32_to_cpu(host->csr.speed_map[1]) + 1);
+ be32_add_cpu(&host->csr.speed_map[1], 1);
host->csr.speed_map[0] = cpu_to_be32(0x3f1 << 16
| csr_crc16(host->csr.speed_map+1,
0x3f1));
host->csr.generation = 2;
- bus_info[1] = __constant_cpu_to_be32(0x31333934);
+ bus_info[1] = IEEE1394_BUSID_MAGIC;
bus_info[2] = cpu_to_be32((hpsb_disable_irm ? 0 : 1 << CSR_IRMC_SHIFT) |
(1 << CSR_CMC_SHIFT) |
(1 << CSR_ISC_SHIFT) |
{
quadlet_t bus_info[CSR_BUS_INFO_SIZE];
- bus_info[1] = __constant_cpu_to_be32(0x31333934);
+ bus_info[1] = IEEE1394_BUSID_MAGIC;
bus_info[2] = cpu_to_be32((0 << CSR_IRMC_SHIFT) |
(0 << CSR_CMC_SHIFT) |
(0 << CSR_ISC_SHIFT) |