*/
#include "drmP.h"
#include "radeon.h"
+#include "avivod.h"
#define RADEON_IDLE_LOOP_MS 100
#define RADEON_RECLOCK_DELAY_MS 200
+#define RADEON_WAIT_VBLANK_TIMEOUT 200
static void radeon_pm_set_clocks_locked(struct radeon_device *rdev);
static void radeon_pm_set_clocks(struct radeon_device *rdev);
-static void radeon_pm_reclock_work_handler(struct work_struct *work);
static void radeon_pm_idle_work_handler(struct work_struct *work);
static int radeon_debugfs_pm_init(struct radeon_device *rdev);
static struct radeon_power_state * radeon_pick_power_state(struct radeon_device *rdev,
enum radeon_pm_state_type type)
{
- int i;
- struct radeon_power_state *power_state = NULL;
+ int i, j;
+ enum radeon_pm_state_type wanted_types[2];
+ int wanted_count;
switch (type) {
case POWER_STATE_TYPE_DEFAULT:
default:
return rdev->pm.default_power_state;
case POWER_STATE_TYPE_POWERSAVE:
- for (i = 0; i < rdev->pm.num_power_states; i++) {
- if (rdev->pm.power_state[i].type == POWER_STATE_TYPE_POWERSAVE) {
- power_state = &rdev->pm.power_state[i];
- break;
- }
- }
- if (power_state == NULL) {
- for (i = 0; i < rdev->pm.num_power_states; i++) {
- if (rdev->pm.power_state[i].type == POWER_STATE_TYPE_BATTERY) {
- power_state = &rdev->pm.power_state[i];
- break;
- }
- }
+ if (rdev->flags & RADEON_IS_MOBILITY) {
+ wanted_types[0] = POWER_STATE_TYPE_POWERSAVE;
+ wanted_types[1] = POWER_STATE_TYPE_BATTERY;
+ wanted_count = 2;
+ } else {
+ wanted_types[0] = POWER_STATE_TYPE_PERFORMANCE;
+ wanted_count = 1;
}
break;
case POWER_STATE_TYPE_BATTERY:
- for (i = 0; i < rdev->pm.num_power_states; i++) {
- if (rdev->pm.power_state[i].type == POWER_STATE_TYPE_BATTERY) {
- power_state = &rdev->pm.power_state[i];
- break;
- }
- }
- if (power_state == NULL) {
- for (i = 0; i < rdev->pm.num_power_states; i++) {
- if (rdev->pm.power_state[i].type == POWER_STATE_TYPE_POWERSAVE) {
- power_state = &rdev->pm.power_state[i];
- break;
- }
- }
+ if (rdev->flags & RADEON_IS_MOBILITY) {
+ wanted_types[0] = POWER_STATE_TYPE_BATTERY;
+ wanted_types[1] = POWER_STATE_TYPE_POWERSAVE;
+ wanted_count = 2;
+ } else {
+ wanted_types[0] = POWER_STATE_TYPE_PERFORMANCE;
+ wanted_count = 1;
}
break;
case POWER_STATE_TYPE_BALANCED:
case POWER_STATE_TYPE_PERFORMANCE:
- for (i = 0; i < rdev->pm.num_power_states; i++) {
- if (rdev->pm.power_state[i].type == type) {
- power_state = &rdev->pm.power_state[i];
- break;
- }
- }
+ wanted_types[0] = type;
+ wanted_count = 1;
break;
}
- if (power_state == NULL)
- return rdev->pm.default_power_state;
+ for (i = 0; i < wanted_count; i++) {
+ for (j = 0; j < rdev->pm.num_power_states; j++) {
+ if (rdev->pm.power_state[j].type == wanted_types[i])
+ return &rdev->pm.power_state[j];
+ }
+ }
- return power_state;
+ return rdev->pm.default_power_state;
}
static struct radeon_pm_clock_info * radeon_pick_clock_mode(struct radeon_device *rdev,
enum radeon_pm_action action)
{
switch (action) {
- case PM_ACTION_NONE:
- default:
- rdev->pm.requested_power_state = rdev->pm.current_power_state;
- rdev->pm.requested_power_state->requested_clock_mode =
- rdev->pm.requested_power_state->current_clock_mode;
- break;
case PM_ACTION_MINIMUM:
rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_BATTERY);
- rdev->pm.requested_power_state->requested_clock_mode =
+ rdev->pm.requested_clock_mode =
radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_LOW);
break;
case PM_ACTION_DOWNCLOCK:
rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_POWERSAVE);
- rdev->pm.requested_power_state->requested_clock_mode =
+ rdev->pm.requested_clock_mode =
radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_MID);
break;
case PM_ACTION_UPCLOCK:
rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_DEFAULT);
- rdev->pm.requested_power_state->requested_clock_mode =
+ rdev->pm.requested_clock_mode =
radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH);
break;
+ case PM_ACTION_NONE:
+ default:
+ DRM_ERROR("Requested mode for not defined action\n");
+ return;
}
DRM_INFO("Requested: e: %d m: %d p: %d\n",
- rdev->pm.requested_power_state->requested_clock_mode->sclk,
- rdev->pm.requested_power_state->requested_clock_mode->mclk,
+ rdev->pm.requested_clock_mode->sclk,
+ rdev->pm.requested_clock_mode->mclk,
rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
}
static void radeon_set_power_state(struct radeon_device *rdev)
{
- if (rdev->pm.requested_power_state == rdev->pm.current_power_state)
+ /* if *_clock_mode are the same, *_power_state are as well */
+ if (rdev->pm.requested_clock_mode == rdev->pm.current_clock_mode)
return;
DRM_INFO("Setting: e: %d m: %d p: %d\n",
- rdev->pm.requested_power_state->requested_clock_mode->sclk,
- rdev->pm.requested_power_state->requested_clock_mode->mclk,
+ rdev->pm.requested_clock_mode->sclk,
+ rdev->pm.requested_clock_mode->mclk,
rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
/* set pcie lanes */
/* set voltage */
/* set engine clock */
- radeon_set_engine_clock(rdev, rdev->pm.requested_power_state->requested_clock_mode->sclk);
+ radeon_set_engine_clock(rdev, rdev->pm.requested_clock_mode->sclk);
/* set memory clock */
rdev->pm.current_power_state = rdev->pm.requested_power_state;
+ rdev->pm.current_clock_mode = rdev->pm.requested_clock_mode;
}
int radeon_pm_init(struct radeon_device *rdev)
rdev->pm.state = PM_STATE_DISABLED;
rdev->pm.planned_action = PM_ACTION_NONE;
rdev->pm.downclocked = false;
- rdev->pm.vblank_callback = false;
if (rdev->bios) {
if (rdev->is_atom_bios)
DRM_ERROR("Failed to register debugfs file for PM!\n");
}
- INIT_WORK(&rdev->pm.reclock_work, radeon_pm_reclock_work_handler);
INIT_DELAYED_WORK(&rdev->pm.idle_work, radeon_pm_idle_work_handler);
if (radeon_dynpm != -1 && radeon_dynpm) {
if (count > 1) {
if (rdev->pm.state == PM_STATE_ACTIVE) {
- wait_queue_head_t wait;
- init_waitqueue_head(&wait);
-
cancel_delayed_work(&rdev->pm.idle_work);
rdev->pm.state = PM_STATE_PAUSED;
rdev->pm.planned_action = PM_ACTION_UPCLOCK;
- radeon_get_power_state(rdev, rdev->pm.planned_action);
- rdev->pm.vblank_callback = true;
-
- mutex_unlock(&rdev->pm.mutex);
-
- wait_event_timeout(wait, !rdev->pm.downclocked,
- msecs_to_jiffies(300));
- if (!rdev->pm.downclocked)
+ if (rdev->pm.downclocked)
radeon_pm_set_clocks(rdev);
DRM_DEBUG("radeon: dynamic power management deactivated\n");
- } else {
- mutex_unlock(&rdev->pm.mutex);
}
} else if (count == 1) {
/* TODO: Increase clocks if needed for current mode */
if (rdev->pm.state == PM_STATE_MINIMUM) {
rdev->pm.state = PM_STATE_ACTIVE;
rdev->pm.planned_action = PM_ACTION_UPCLOCK;
- radeon_get_power_state(rdev, rdev->pm.planned_action);
- radeon_pm_set_clocks_locked(rdev);
+ radeon_pm_set_clocks(rdev);
queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
DRM_DEBUG("radeon: dynamic power management activated\n");
}
-
- mutex_unlock(&rdev->pm.mutex);
}
else { /* count == 0 */
if (rdev->pm.state != PM_STATE_MINIMUM) {
rdev->pm.state = PM_STATE_MINIMUM;
rdev->pm.planned_action = PM_ACTION_MINIMUM;
- radeon_get_power_state(rdev, rdev->pm.planned_action);
- radeon_pm_set_clocks_locked(rdev);
+ radeon_pm_set_clocks(rdev);
}
-
- mutex_unlock(&rdev->pm.mutex);
}
+
+ mutex_unlock(&rdev->pm.mutex);
}
+static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish)
+{
+ u32 stat_crtc1 = 0, stat_crtc2 = 0;
+ bool in_vbl = true;
+
+ if (ASIC_IS_AVIVO(rdev)) {
+ if (rdev->pm.active_crtcs & (1 << 0)) {
+ stat_crtc1 = RREG32(D1CRTC_STATUS);
+ if (!(stat_crtc1 & 1))
+ in_vbl = false;
+ }
+ if (rdev->pm.active_crtcs & (1 << 1)) {
+ stat_crtc2 = RREG32(D2CRTC_STATUS);
+ if (!(stat_crtc2 & 1))
+ in_vbl = false;
+ }
+ }
+ if (in_vbl == false)
+ DRM_INFO("not in vbl for pm change %08x %08x at %s\n", stat_crtc1,
+ stat_crtc2, finish ? "exit" : "entry");
+ return in_vbl;
+}
static void radeon_pm_set_clocks_locked(struct radeon_device *rdev)
{
/*radeon_fence_wait_last(rdev);*/
DRM_ERROR("%s: PM_ACTION_NONE\n", __func__);
break;
}
+
+ /* check if we are in vblank */
+ radeon_pm_debug_check_in_vbl(rdev, false);
radeon_set_power_state(rdev);
+ radeon_pm_debug_check_in_vbl(rdev, true);
rdev->pm.planned_action = PM_ACTION_NONE;
}
static void radeon_pm_set_clocks(struct radeon_device *rdev)
{
- mutex_lock(&rdev->pm.mutex);
- /* new VBLANK irq may come before handling previous one */
- if (rdev->pm.vblank_callback) {
- mutex_lock(&rdev->cp.mutex);
- if (rdev->pm.req_vblank & (1 << 0)) {
- rdev->pm.req_vblank &= ~(1 << 0);
- drm_vblank_put(rdev->ddev, 0);
- }
- if (rdev->pm.req_vblank & (1 << 1)) {
- rdev->pm.req_vblank &= ~(1 << 1);
- drm_vblank_put(rdev->ddev, 1);
- }
- rdev->pm.vblank_callback = false;
- radeon_pm_set_clocks_locked(rdev);
- mutex_unlock(&rdev->cp.mutex);
+ radeon_get_power_state(rdev, rdev->pm.planned_action);
+ mutex_lock(&rdev->cp.mutex);
+
+ if (rdev->pm.active_crtcs & (1 << 0)) {
+ rdev->pm.req_vblank |= (1 << 0);
+ drm_vblank_get(rdev->ddev, 0);
+ }
+ if (rdev->pm.active_crtcs & (1 << 1)) {
+ rdev->pm.req_vblank |= (1 << 1);
+ drm_vblank_get(rdev->ddev, 1);
+ }
+ if (rdev->pm.active_crtcs)
+ wait_event_interruptible_timeout(
+ rdev->irq.vblank_queue, 0,
+ msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT));
+ if (rdev->pm.req_vblank & (1 << 0)) {
+ rdev->pm.req_vblank &= ~(1 << 0);
+ drm_vblank_put(rdev->ddev, 0);
+ }
+ if (rdev->pm.req_vblank & (1 << 1)) {
+ rdev->pm.req_vblank &= ~(1 << 1);
+ drm_vblank_put(rdev->ddev, 1);
}
- mutex_unlock(&rdev->pm.mutex);
-}
-static void radeon_pm_reclock_work_handler(struct work_struct *work)
-{
- struct radeon_device *rdev;
- rdev = container_of(work, struct radeon_device,
- pm.reclock_work);
- radeon_pm_set_clocks(rdev);
+ radeon_pm_set_clocks_locked(rdev);
+ mutex_unlock(&rdev->cp.mutex);
}
static void radeon_pm_idle_work_handler(struct work_struct *work)
pm.idle_work.work);
mutex_lock(&rdev->pm.mutex);
- if (rdev->pm.state == PM_STATE_ACTIVE &&
- !rdev->pm.vblank_callback) {
+ if (rdev->pm.state == PM_STATE_ACTIVE) {
unsigned long irq_flags;
int not_processed = 0;
}
if (rdev->pm.planned_action != PM_ACTION_NONE &&
- jiffies > rdev->pm.action_timeout) {
- if (rdev->pm.active_crtcs & (1 << 0)) {
- rdev->pm.req_vblank |= (1 << 0);
- drm_vblank_get(rdev->ddev, 0);
- }
- if (rdev->pm.active_crtcs & (1 << 1)) {
- rdev->pm.req_vblank |= (1 << 1);
- drm_vblank_get(rdev->ddev, 1);
- }
- radeon_get_power_state(rdev, rdev->pm.planned_action);
- rdev->pm.vblank_callback = true;
+ jiffies > rdev->pm.action_timeout) {
+ radeon_pm_set_clocks(rdev);
}
}
mutex_unlock(&rdev->pm.mutex);
seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
if (rdev->asic->get_memory_clock)
seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
+ if (rdev->asic->get_pcie_lanes)
+ seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
return 0;
}