DMAENGINE: ste_dma40: fix bug related to callback handling

[pandora-kernel.git] / drivers / dma / ste_dma40.c

diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 17e2600..a6a7d66 100644 (file)
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -640,45 +640,22 @@ static void d40_config_set_event(struct d40_chan *d40c, bool do_enable)
 
 static u32 d40_chan_has_events(struct d40_chan *d40c)
 {
-       u32 val = 0;
+       u32 val;
 
-       /* If SSLNK or SDLNK is zero all events are disabled */
-       if ((d40c->dma_cfg.dir ==  STEDMA40_PERIPH_TO_MEM) ||
-           (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_PERIPH))
-               val = readl(d40c->base->virtbase + D40_DREG_PCBASE +
-                           d40c->phy_chan->num * D40_DREG_PCDELTA +
-                           D40_CHAN_REG_SSLNK);
-
-       if (d40c->dma_cfg.dir !=  STEDMA40_PERIPH_TO_MEM)
-               val = readl(d40c->base->virtbase + D40_DREG_PCBASE +
-                           d40c->phy_chan->num * D40_DREG_PCDELTA +
-                           D40_CHAN_REG_SDLNK);
-       return val;
-}
+       val = readl(d40c->base->virtbase + D40_DREG_PCBASE +
+                   d40c->phy_chan->num * D40_DREG_PCDELTA +
+                   D40_CHAN_REG_SSLNK);
 
-static void d40_config_enable_lidx(struct d40_chan *d40c)
-{
-       /* Set LIDX for lcla */
-       writel((d40c->phy_chan->num << D40_SREG_ELEM_LOG_LIDX_POS) &
-              D40_SREG_ELEM_LOG_LIDX_MASK,
-              d40c->base->virtbase + D40_DREG_PCBASE +
-              d40c->phy_chan->num * D40_DREG_PCDELTA + D40_CHAN_REG_SDELT);
-
-       writel((d40c->phy_chan->num << D40_SREG_ELEM_LOG_LIDX_POS) &
-              D40_SREG_ELEM_LOG_LIDX_MASK,
-              d40c->base->virtbase + D40_DREG_PCBASE +
-              d40c->phy_chan->num * D40_DREG_PCDELTA + D40_CHAN_REG_SSELT);
+       val |= readl(d40c->base->virtbase + D40_DREG_PCBASE +
+                    d40c->phy_chan->num * D40_DREG_PCDELTA +
+                    D40_CHAN_REG_SDLNK);
+       return val;
 }
 
-static int d40_config_write(struct d40_chan *d40c)
+static void d40_config_write(struct d40_chan *d40c)
 {
        u32 addr_base;
        u32 var;
-       int res;
-
-       res = d40_channel_execute_command(d40c, D40_DMA_SUSPEND_REQ);
-       if (res)
-               return res;
 
        /* Odd addresses are even addresses + 4 */
        addr_base = (d40c->phy_chan->num % 2) * 4;
@@ -704,9 +681,20 @@ static int d40_config_write(struct d40_chan *d40c)
                       d40c->phy_chan->num * D40_DREG_PCDELTA +
                       D40_CHAN_REG_SDCFG);
 
-               d40_config_enable_lidx(d40c);
+               /* Set LIDX for lcla */
+               writel((d40c->phy_chan->num << D40_SREG_ELEM_LOG_LIDX_POS) &
+                      D40_SREG_ELEM_LOG_LIDX_MASK,
+                      d40c->base->virtbase + D40_DREG_PCBASE +
+                      d40c->phy_chan->num * D40_DREG_PCDELTA +
+                      D40_CHAN_REG_SDELT);
+
+               writel((d40c->phy_chan->num << D40_SREG_ELEM_LOG_LIDX_POS) &
+                      D40_SREG_ELEM_LOG_LIDX_MASK,
+                      d40c->base->virtbase + D40_DREG_PCBASE +
+                      d40c->phy_chan->num * D40_DREG_PCDELTA +
+                      D40_CHAN_REG_SSELT);
+
        }
-       return res;
 }
 
 static void d40_desc_load(struct d40_chan *d40c, struct d40_desc *d40d)
@@ -890,7 +878,7 @@ static void dma_tasklet(unsigned long data)
 
        spin_unlock_irqrestore(&d40c->lock, flags);
 
-       if (callback)
+       if (callback && (d40d_fin->txd.flags & DMA_PREP_INTERRUPT))
                callback(callback_param);
 
        return;
@@ -919,7 +907,6 @@ static irqreturn_t d40_handle_interrupt(int irq, void *data)
 
        int i;
        u32 regs[ARRAY_SIZE(il)];
-       u32 tmp;
        u32 idx;
        u32 row;
        long chan = -1;
@@ -946,9 +933,7 @@ static irqreturn_t d40_handle_interrupt(int irq, void *data)
                idx = chan & (BITS_PER_LONG - 1);
 
                /* ACK interrupt */
-               tmp = readl(base->virtbase + il[row].clr);
-               tmp |= 1 << idx;
-               writel(tmp, base->virtbase + il[row].clr);
+               writel(1 << idx, base->virtbase + il[row].clr);
 
                if (il[row].offset == D40_PHY_CHAN)
                        d40c = base->lookup_phy_chans[idx];
@@ -981,14 +966,39 @@ static int d40_validate_conf(struct d40_chan *d40c,
        bool is_log = (conf->channel_type & STEDMA40_CHANNEL_IN_OPER_MODE)
                == STEDMA40_CHANNEL_IN_LOG_MODE;
 
-       if (d40c->dma_cfg.dir == STEDMA40_MEM_TO_PERIPH &&
+       if (!conf->dir) {
+               dev_err(&d40c->chan.dev->device, "[%s] Invalid direction.\n",
+                       __func__);
+               res = -EINVAL;
+       }
+
+       if (conf->dst_dev_type != STEDMA40_DEV_DST_MEMORY &&
+           d40c->base->plat_data->dev_tx[conf->dst_dev_type] == 0 &&
+           d40c->runtime_addr == 0) {
+
+               dev_err(&d40c->chan.dev->device,
+                       "[%s] Invalid TX channel address (%d)\n",
+                       __func__, conf->dst_dev_type);
+               res = -EINVAL;
+       }
+
+       if (conf->src_dev_type != STEDMA40_DEV_SRC_MEMORY &&
+           d40c->base->plat_data->dev_rx[conf->src_dev_type] == 0 &&
+           d40c->runtime_addr == 0) {
+               dev_err(&d40c->chan.dev->device,
+                       "[%s] Invalid RX channel address (%d)\n",
+                       __func__, conf->src_dev_type);
+               res = -EINVAL;
+       }
+
+       if (conf->dir == STEDMA40_MEM_TO_PERIPH &&
            dst_event_group == STEDMA40_DEV_DST_MEMORY) {
                dev_err(&d40c->chan.dev->device, "[%s] Invalid dst\n",
                        __func__);
                res = -EINVAL;
        }
 
-       if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM &&
+       if (conf->dir == STEDMA40_PERIPH_TO_MEM &&
            src_event_group == STEDMA40_DEV_SRC_MEMORY) {
                dev_err(&d40c->chan.dev->device, "[%s] Invalid src\n",
                        __func__);
@@ -1573,7 +1583,6 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
                                         d40d->lli_log.src,
                                         d40c->log_def.lcsp1,
                                         d40c->dma_cfg.src_info.data_width,
-                                        dma_flags & DMA_PREP_INTERRUPT,
                                         d40d->lli_tx_len,
                                         d40c->base->plat_data->llis_per_log);
 
@@ -1583,7 +1592,6 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
                                         d40d->lli_log.dst,
                                         d40c->log_def.lcsp3,
                                         d40c->dma_cfg.dst_info.data_width,
-                                        dma_flags & DMA_PREP_INTERRUPT,
                                         d40d->lli_tx_len,
                                         d40c->base->plat_data->llis_per_log);
 
@@ -1602,8 +1610,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
                                        d40d->lli_phy.src_addr,
                                        d40c->src_def_cfg,
                                        d40c->dma_cfg.src_info.data_width,
-                                       d40c->dma_cfg.src_info.psize,
-                                       true);
+                                       d40c->dma_cfg.src_info.psize);
 
                if (res < 0)
                        goto err;
@@ -1615,8 +1622,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
                                        d40d->lli_phy.dst_addr,
                                        d40c->dst_def_cfg,
                                        d40c->dma_cfg.dst_info.data_width,
-                                       d40c->dma_cfg.dst_info.psize,
-                                       true);
+                                       d40c->dma_cfg.dst_info.psize);
 
                if (res < 0)
                        goto err;
@@ -1712,14 +1718,8 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
         * resource is free. In case of multiple logical channels
         * on the same physical resource, only the first write is necessary.
         */
-       if (is_free_phy) {
-               err = d40_config_write(d40c);
-               if (err) {
-                       dev_err(&d40c->chan.dev->device,
-                               "[%s] Failed to configure channel\n",
-                               __func__);
-               }
-       }
+       if (is_free_phy)
+               d40_config_write(d40c);
 fail:
        spin_unlock_irqrestore(&d40c->lock, flags);
        return err;
@@ -1909,7 +1909,6 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
                                       d40c->dma_cfg.src_info.data_width,
                                       d40c->dma_cfg.dst_info.data_width,
                                       direction,
-                                      dma_flags & DMA_PREP_INTERRUPT,
                                       dev_addr, d40d->lli_tx_len,
                                       d40c->base->plat_data->llis_per_log);
 
@@ -1961,8 +1960,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
                                d40d->lli_phy.src_addr,
                                d40c->src_def_cfg,
                                d40c->dma_cfg.src_info.data_width,
-                               d40c->dma_cfg.src_info.psize,
-                               true);
+                               d40c->dma_cfg.src_info.psize);
        if (res < 0)
                return res;
 
@@ -1973,8 +1971,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
                                d40d->lli_phy.dst_addr,
                                d40c->dst_def_cfg,
                                d40c->dma_cfg.dst_info.data_width,
-                               d40c->dma_cfg.dst_info.psize,
-                                true);
+                               d40c->dma_cfg.dst_info.psize);
        if (res < 0)
                return res;