Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groec...

[pandora-kernel.git] / drivers / bcma / core.c

diff --git a/drivers/bcma/core.c b/drivers/bcma/core.c
index 1ec7d45..4a04a49 100644 (file)
--- a/drivers/bcma/core.c
+++ b/drivers/bcma/core.c
@@ -50,3 +50,75 @@ int bcma_core_enable(struct bcma_device *core, u32 flags)
        return 0;
 }
 EXPORT_SYMBOL_GPL(bcma_core_enable);
+
+void bcma_core_set_clockmode(struct bcma_device *core,
+                            enum bcma_clkmode clkmode)
+{
+       u16 i;
+
+       WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON &&
+               core->id.id != BCMA_CORE_PCIE &&
+               core->id.id != BCMA_CORE_80211);
+
+       switch (clkmode) {
+       case BCMA_CLKMODE_FAST:
+               bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
+               udelay(64);
+               for (i = 0; i < 1500; i++) {
+                       if (bcma_read32(core, BCMA_CLKCTLST) &
+                           BCMA_CLKCTLST_HAVEHT) {
+                               i = 0;
+                               break;
+                       }
+                       udelay(10);
+               }
+               if (i)
+                       pr_err("HT force timeout\n");
+               break;
+       case BCMA_CLKMODE_DYNAMIC:
+               pr_warn("Dynamic clockmode not supported yet!\n");
+               break;
+       }
+}
+EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);
+
+void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
+{
+       u16 i;
+
+       WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
+       WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);
+
+       if (on) {
+               bcma_set32(core, BCMA_CLKCTLST, req);
+               for (i = 0; i < 10000; i++) {
+                       if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
+                           status) {
+                               i = 0;
+                               break;
+                       }
+                       udelay(10);
+               }
+               if (i)
+                       pr_err("PLL enable timeout\n");
+       } else {
+               pr_warn("Disabling PLL not supported yet!\n");
+       }
+}
+EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
+
+u32 bcma_core_dma_translation(struct bcma_device *core)
+{
+       switch (core->bus->hosttype) {
+       case BCMA_HOSTTYPE_PCI:
+               if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
+                       return BCMA_DMA_TRANSLATION_DMA64_CMT;
+               else
+                       return BCMA_DMA_TRANSLATION_DMA32_CMT;
+       default:
+               pr_err("DMA translation unknown for host %d\n",
+                      core->bus->hosttype);
+       }
+       return BCMA_DMA_TRANSLATION_NONE;
+}
+EXPORT_SYMBOL(bcma_core_dma_translation);