libata-link: linkify config/EH related functions

[pandora-kernel.git] / drivers / ata / pata_pdc2027x.c

diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c
index 69a5aa4..db069d7 100644 (file)
--- a/drivers/ata/pata_pdc2027x.c
+++ b/drivers/ata/pata_pdc2027x.c
@@ -35,7 +35,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME       "pata_pdc2027x"
-#define DRV_VERSION    "0.9"
+#define DRV_VERSION    "1.0"
 #undef PDC_DEBUG
 
 #ifdef PDC_DEBUG
@@ -69,7 +69,7 @@ static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev);
 static int pdc2027x_check_atapi_dma(struct ata_queued_cmd *qc);
 static unsigned long pdc2027x_mode_filter(struct ata_device *adev, unsigned long mask);
 static int pdc2027x_cable_detect(struct ata_port *ap);
-static int pdc2027x_set_mode(struct ata_port *ap, struct ata_device **r_failed);
+static int pdc2027x_set_mode(struct ata_link *link, struct ata_device **r_failed);
 
 /*
  * ATA Timing Tables based on 133MHz controller clock.
@@ -300,7 +300,7 @@ static inline int pdc2027x_port_enabled(struct ata_port *ap)
 
 /**
  *     pdc2027x_prereset - prereset for PATA host controller
- *     @ap: Target port
+ *     @link: Target link
  *     @deadline: deadline jiffies for the operation
  *
  *     Probeinit including cable detection.
@@ -309,12 +309,12 @@ static inline int pdc2027x_port_enabled(struct ata_port *ap)
  *     None (inherited from caller).
  */
 
-static int pdc2027x_prereset(struct ata_port *ap, unsigned long deadline)
+static int pdc2027x_prereset(struct ata_link *link, unsigned long deadline)
 {
        /* Check whether port enabled */
-       if (!pdc2027x_port_enabled(ap))
+       if (!pdc2027x_port_enabled(link->ap))
                return -ENOENT;
-       return ata_std_prereset(ap, deadline);
+       return ata_std_prereset(link, deadline);
 }
 
 /**
@@ -470,24 +470,24 @@ static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 
 /**
  *     pdc2027x_set_mode - Set the timing registers back to correct values.
- *     @ap: Port to configure
+ *     @link: link to configure
  *     @r_failed: Returned device for failure
  *
  *     The pdc2027x hardware will look at "SET FEATURES" and change the timing registers
  *     automatically. The values set by the hardware might be incorrect, under 133Mhz PLL.
  *     This function overwrites the possibly incorrect values set by the hardware to be correct.
  */
-static int pdc2027x_set_mode(struct ata_port *ap, struct ata_device **r_failed)
+static int pdc2027x_set_mode(struct ata_link *link, struct ata_device **r_failed)
 {
-       int i;
-
-       i = ata_do_set_mode(ap, r_failed);
-       if (i < 0)
-               return i;
+       struct ata_port *ap = link->ap;
+       struct ata_device *dev;
+       int rc;
 
-       for (i = 0; i < ATA_MAX_DEVICES; i++) {
-               struct ata_device *dev = &ap->device[i];
+       rc = ata_do_set_mode(link, r_failed);
+       if (rc < 0)
+               return rc;
 
+       ata_link_for_each_dev(dev, link) {
                if (ata_dev_enabled(dev)) {
 
                        pdc2027x_set_piomode(ap, dev);
@@ -563,13 +563,13 @@ static long pdc_read_counter(struct ata_host *host)
        u32 bccrl, bccrh, bccrlv, bccrhv;
 
 retry:
-       bccrl = readl(mmio_base + PDC_BYTE_COUNT) & 0xffff;
-       bccrh = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0xffff;
+       bccrl = readl(mmio_base + PDC_BYTE_COUNT) & 0x7fff;
+       bccrh = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;
        rmb();
 
        /* Read the counter values again for verification */
-       bccrlv = readl(mmio_base + PDC_BYTE_COUNT) & 0xffff;
-       bccrhv = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0xffff;
+       bccrlv = readl(mmio_base + PDC_BYTE_COUNT) & 0x7fff;
+       bccrhv = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;
        rmb();
 
        counter = (bccrh << 15) | bccrl;
@@ -692,16 +692,16 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
        struct timeval start_time, end_time;
        long pll_clock, usec_elapsed;
 
-       /* Read current counter value */
-       start_count = pdc_read_counter(host);
-       do_gettimeofday(&start_time);
-
        /* Start the test mode */
        scr = readl(mmio_base + PDC_SYS_CTL);
        PDPRINTK("scr[%X]\n", scr);
        writel(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL);
        readl(mmio_base + PDC_SYS_CTL); /* flush */
 
+       /* Read current counter value */
+       start_count = pdc_read_counter(host);
+       do_gettimeofday(&start_time);
+
        /* Let the counter run for 100 ms. */
        mdelay(100);
 
@@ -719,7 +719,7 @@ static long pdc_detect_pll_input_clock(struct ata_host *host)
        usec_elapsed = (end_time.tv_sec - start_time.tv_sec) * 1000000 +
                (end_time.tv_usec - start_time.tv_usec);
 
-       pll_clock = (start_count - end_count) / 100 *
+       pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 *
                (100000000 / usec_elapsed);
 
        PDPRINTK("start[%ld] end[%ld] \n", start_count, end_count);