* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <status_led.h>
+#include <dm.h>
+#include <ns16550.h>
#include <twl4030.h>
#include <netdev.h>
#include <asm/gpio.h>
-#include <asm/omap_gpmc.h>
#include <asm/io.h>
#include <asm/arch/mem.h>
#include <asm/arch/mmc_host_def.h>
DECLARE_GLOBAL_DATA_PTR;
+const omap3_sysinfo sysinfo = {
+ DDR_STACKED,
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
+ "IGEPv2",
+#endif
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
+ "IGEP COM MODULE/ELECTRON",
+#endif
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
+ "IGEP COM PROTON",
+#endif
+#if defined(CONFIG_ENV_IS_IN_ONENAND)
+ "ONENAND",
+#else
+ "NAND",
+#endif
+};
+
#if defined(CONFIG_CMD_NET)
/* GPMC definitions for LAN9221 chips */
static const u32 gpmc_lan_config[] = {
};
#endif
+static const struct ns16550_platdata igep_serial = {
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
+};
+
+U_BOOT_DEVICE(igep_uart) = {
+ "ns16550_serial",
+ &igep_serial
+};
+
/*
* Routine: board_init
* Description: Early hardware init.
/* boot param addr */
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
- return 0;
-}
-
-#if defined(CONFIG_SHOW_BOOT_PROGRESS) && !defined(CONFIG_SPL_BUILD)
-void show_boot_progress(int val)
-{
- if (val < 0) {
- /* something went wrong */
- return;
- }
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
+ status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
+#endif
- if (!gpio_request(IGEP00X0_GPIO_LED, ""))
- gpio_direction_output(IGEP00X0_GPIO_LED, 1);
+ return 0;
}
-#endif
#ifdef CONFIG_SPL_BUILD
/*
#endif
#if defined(CONFIG_CMD_NET)
+
+static void reset_net_chip(int gpio)
+{
+ if (!gpio_request(gpio, "eth nrst")) {
+ gpio_direction_output(gpio, 1);
+ udelay(1);
+ gpio_set_value(gpio, 0);
+ udelay(40);
+ gpio_set_value(gpio, 1);
+ mdelay(10);
+ }
+}
+
/*
* Routine: setup_net_chip
* Description: Setting up the configuration GPMC registers specific to the
{
struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
- enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
- GPMC_SIZE_16M);
+ enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
+ CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
&ctrl_base->gpmc_nadv_ale);
- /* Make GPIO 64 as output pin and send a magic pulse through it */
- if (!gpio_request(64, "")) {
- gpio_direction_output(64, 0);
- gpio_set_value(64, 1);
- udelay(1);
- gpio_set_value(64, 0);
- udelay(1);
- gpio_set_value(64, 1);
- }
+ reset_net_chip(64);
}
#else
static inline void setup_net_chip(void) {}
}
#endif
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
+}
+#endif
+
+void set_fdt(void)
+{
+ switch (gd->bd->bi_arch_number) {
+ case MACH_TYPE_IGEP0020:
+ setenv("fdtfile", "omap3-igep0020.dtb");
+ break;
+ case MACH_TYPE_IGEP0030:
+ setenv("fdtfile", "omap3-igep0030.dtb");
+ break;
+ }
+}
+
/*
* Routine: misc_init_r
* Description: Configure board specific parts
setup_net_chip();
- dieid_num_r();
+ omap_die_id_display();
+
+ set_fdt();
return 0;
}
#if defined(CONFIG_CMD_NET)
int board_eth_init(bd_t *bis)
{
- int rc = 0;
#ifdef CONFIG_SMC911X
- rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+ return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#else
+ return 0;
#endif
- return rc;
}
#endif