Merge master.kernel.org:/home/rmk/linux-2.6-arm

[pandora-kernel.git] / arch / x86_64 / kernel / mpparse.c

diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index 1d61f10..083da7e 100644 (file)
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -42,7 +42,7 @@ int acpi_found_madt;
  * Various Linux-internal data structures created from the
  * MP-table.
  */
-int apic_version [MAX_APICS];
+unsigned char apic_version [MAX_APICS];
 unsigned char mp_bus_id_to_type [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
 int mp_bus_id_to_pci_bus [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
 
@@ -106,10 +106,11 @@ static int __init mpf_checksum(unsigned char *mp, int len)
        return sum & 0xFF;
 }
 
-static void __init MP_processor_info (struct mpc_config_processor *m)
+static void __cpuinit MP_processor_info (struct mpc_config_processor *m)
 {
-       int ver, cpu;
-       static int found_bsp=0;
+       int cpu;
+       unsigned char ver;
+       cpumask_t tmp_map;
 
        if (!(m->mpc_cpuflag & CPU_ENABLED)) {
                disabled_cpus++;
@@ -132,13 +133,17 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
                return;
        }
 
-       cpu = num_processors++;
+       num_processors++;
+       cpus_complement(tmp_map, cpu_present_map);
+       cpu = first_cpu(tmp_map);
 
-       if (m->mpc_apicid > MAX_APICS) {
+#if MAX_APICS < 255    
+       if ((int)m->mpc_apicid > MAX_APICS) {
                printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
                        m->mpc_apicid, MAX_APICS);
                return;
        }
+#endif
        ver = m->mpc_apicver;
 
        physid_set(m->mpc_apicid, phys_cpu_present_map);
@@ -157,12 +162,7 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
                 * entry is BSP, and so on.
                 */
                cpu = 0;
-
-               bios_cpu_apicid[0] = m->mpc_apicid;
-               x86_cpu_to_apicid[0] = m->mpc_apicid;
-               found_bsp = 1;
-       } else
-               cpu = num_processors - found_bsp;
+       }
        bios_cpu_apicid[cpu] = m->mpc_apicid;
        x86_cpu_to_apicid[cpu] = m->mpc_apicid;
 
@@ -285,9 +285,9 @@ static int __init smp_read_mpc(struct mp_config_table *mpc)
 
        memcpy(str,mpc->mpc_productid,12);
        str[12]=0;
-       printk(KERN_INFO "Product ID: %s ",str);
+       printk("Product ID: %s ",str);
 
-       printk(KERN_INFO "APIC at: 0x%X\n",mpc->mpc_lapic);
+       printk("APIC at: 0x%X\n",mpc->mpc_lapic);
 
        /* save the local APIC address, it might be non-default */
        if (!acpi_lapic)
@@ -688,7 +688,7 @@ void __init mp_register_lapic_address (
 }
 
 
-void __init mp_register_lapic (
+void __cpuinit mp_register_lapic (
        u8                      id, 
        u8                      enabled)
 {
@@ -912,7 +912,7 @@ void __init mp_config_acpi_legacy_irqs (void)
 
 #define MAX_GSI_NUM    4096
 
-int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
+int mp_register_gsi(u32 gsi, int triggering, int polarity)
 {
        int                     ioapic = -1;
        int                     ioapic_pin = 0;
@@ -961,14 +961,24 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
 
        mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
-       if (edge_level) {
+       if (triggering == ACPI_LEVEL_SENSITIVE) {
                /*
                 * For PCI devices assign IRQs in order, avoiding gaps
                 * due to unused I/O APIC pins.
                 */
                int irq = gsi;
                if (gsi < MAX_GSI_NUM) {
-                       if (gsi > 15)
+                       /*
+                        * Retain the VIA chipset work-around (gsi > 15), but
+                        * avoid a problem where the 8254 timer (IRQ0) is setup
+                        * via an override (so it's not on pin 0 of the ioapic),
+                        * and at the same time, the pin 0 interrupt is a PCI
+                        * type.  The gsi > 15 test could cause these two pins
+                        * to be shared as IRQ0, and they are not shareable.
+                        * So test for this condition, and if necessary, avoid
+                        * the pin collision.
+                        */
+                       if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
                                gsi = pci_irq++;
                        /*
                         * Don't assign IRQ used by ACPI SCI
@@ -983,8 +993,8 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
        }
 
        io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
-               edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
-               active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);
+               triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
+               polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
        return gsi;
 }