Merge branch 'tip/perf/core-2' of git://git.kernel.org/pub/scm/linux/kernel/git/roste...

[pandora-kernel.git] / arch / x86 / kernel / tsc.c

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 1e62442..6cc6922 100644 (file)
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -763,26 +763,6 @@ static cycle_t read_tsc(struct clocksource *cs)
                ret : clocksource_tsc.cycle_last;
 }
 
-#ifdef CONFIG_X86_64
-static cycle_t __vsyscall_fn vread_tsc(void)
-{
-       cycle_t ret;
-
-       /*
-        * Empirically, a fence (of type that depends on the CPU)
-        * before rdtsc is enough to ensure that rdtsc is ordered
-        * with respect to loads.  The various CPU manuals are unclear
-        * as to whether rdtsc can be reordered with later loads,
-        * but no one has ever seen it happen.
-        */
-       rdtsc_barrier();
-       ret = (cycle_t)vget_cycles();
-
-       return ret >= VVAR(vsyscall_gtod_data).clock.cycle_last ?
-               ret : VVAR(vsyscall_gtod_data).clock.cycle_last;
-}
-#endif
-
 static void resume_tsc(struct clocksource *cs)
 {
        clocksource_tsc.cycle_last = 0;