Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

[pandora-kernel.git] / arch / x86 / kernel / cpu / intel_cacheinfo.c

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 1ce1af2..c105c53 100644 (file)
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -327,7 +327,6 @@ static void __cpuinit amd_calc_l3_indices(struct amd_l3_cache *l3)
        l3->subcaches[2] = sc2 = !(val & BIT(8))  + !(val & BIT(9));
        l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13));
 
-       l3->indices = (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1;
        l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
 }
 
@@ -454,27 +453,16 @@ int amd_set_l3_disable_slot(struct amd_l3_cache *l3, int cpu, unsigned slot,
 {
        int ret = 0;
 
-#define SUBCACHE_MASK  (3UL << 20)
-#define SUBCACHE_INDEX 0xfff
-
-       /*
-        * check whether this slot is already used or
-        * the index is already disabled
-        */
+       /*  check if @slot is already used or the index is already disabled */
        ret = amd_get_l3_disable_slot(l3, slot);
        if (ret >= 0)
                return -EINVAL;
 
-       /*
-        * check whether the other slot has disabled the
-        * same index already
-        */
-       if (index == amd_get_l3_disable_slot(l3, !slot))
+       if (index > l3->indices)
                return -EINVAL;
 
-       /* do not allow writes outside of allowed bits */
-       if ((index & ~(SUBCACHE_MASK | SUBCACHE_INDEX)) ||
-           ((index & SUBCACHE_INDEX) > l3->indices))
+       /* check whether the other slot has disabled the same index already */
+       if (index == amd_get_l3_disable_slot(l3, !slot))
                return -EINVAL;
 
        amd_l3_disable_index(l3, cpu, slot, index);