Merge branch 'for-linus' of ssh://master.kernel.org/pub/scm/linux/kernel/git/ieee1394...

[pandora-kernel.git] / arch / sh / mm / Kconfig

diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 814a175..6b0d28a 100644 (file)
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -20,6 +20,7 @@ config CPU_SH4
        bool
        select CPU_HAS_INTEVT
        select CPU_HAS_SR_RB
+       select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2
 
 config CPU_SH4A
        bool
@@ -34,6 +35,9 @@ config CPU_SUBTYPE_ST40
        select CPU_SH4
        select CPU_HAS_INTC2_IRQ
 
+config CPU_SHX2
+       bool
+
 #
 # Processor subtypes
 #
@@ -68,6 +72,7 @@ config CPU_SUBTYPE_SH7705
 config CPU_SUBTYPE_SH7706
        bool "Support SH7706 processor"
        select CPU_SH3
+       select CPU_HAS_IPR_IRQ
        help
          Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
 
@@ -88,6 +93,7 @@ config CPU_SUBTYPE_SH7708
 config CPU_SUBTYPE_SH7709
        bool "Support SH7709 processor"
        select CPU_SH3
+       select CPU_HAS_IPR_IRQ
        select CPU_HAS_PINT_IRQ
        help
          Select SH7709 if you have a  80 Mhz SH-3 HD6417709 CPU.
@@ -103,6 +109,7 @@ comment "SH-4 Processor Support"
 config CPU_SUBTYPE_SH7750
        bool "Support SH7750 processor"
        select CPU_SH4
+       select CPU_HAS_IPR_IRQ
        help
          Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
 
@@ -118,15 +125,18 @@ config CPU_SUBTYPE_SH7750R
        bool "Support SH7750R processor"
        select CPU_SH4
        select CPU_SUBTYPE_SH7750
+       select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7750S
        bool "Support SH7750S processor"
        select CPU_SH4
        select CPU_SUBTYPE_SH7750
+       select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7751
        bool "Support SH7751 processor"
        select CPU_SH4
+       select CPU_HAS_IPR_IRQ
        help
          Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
          or if you have a HD6417751R CPU.
@@ -135,11 +145,13 @@ config CPU_SUBTYPE_SH7751R
        bool "Support SH7751R processor"
        select CPU_SH4
        select CPU_SUBTYPE_SH7751
+       select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7760
        bool "Support SH7760 processor"
        select CPU_SH4
        select CPU_HAS_INTC2_IRQ
+       select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH4_202
        bool "Support SH4-202 processor"
@@ -171,6 +183,12 @@ config CPU_SUBTYPE_SH7780
        select CPU_SH4A
        select CPU_HAS_INTC2_IRQ
 
+config CPU_SUBTYPE_SH7785
+       bool "Support SH7785 processor"
+       select CPU_SH4A
+       select CPU_SHX2
+       select CPU_HAS_INTC2_IRQ
+
 comment "SH4AL-DSP Processor Support"
 
 config CPU_SUBTYPE_SH73180
@@ -181,6 +199,12 @@ config CPU_SUBTYPE_SH7343
        bool "Support SH7343 processor"
        select CPU_SH4AL_DSP
 
+config CPU_SUBTYPE_SH7722
+       bool "Support SH7722 processor"
+       select CPU_SH4AL_DSP
+       select CPU_SHX2
+       select CPU_HAS_IPR_IRQ
+
 endmenu
 
 menu "Memory management options"
@@ -230,13 +254,22 @@ config MEMORY_SIZE
 
 config 32BIT
        bool "Support 32-bit physical addressing through PMB"
-       depends on CPU_SH4A && MMU
+       depends on CPU_SH4A && MMU && (!X2TLB || BROKEN)
        default y
        help
          If you say Y here, physical addressing will be extended to
          32-bits through the SH-4A PMB. If this is not set, legacy
          29-bit physical addressing will be used.
 
+config X2TLB
+       bool "Enable extended TLB mode"
+       depends on CPU_SHX2 && MMU && EXPERIMENTAL
+       help
+         Selecting this option will enable the extended mode of the SH-X2
+         TLB. For legacy SH-X behaviour and interoperability, say N. For
+         all of the fun new features and a willingless to submit bug reports,
+         say Y.
+
 config VSYSCALL
        bool "Support vsyscall page"
        depends on MMU
@@ -250,17 +283,53 @@ config VSYSCALL
          For systems with an MMU that can afford to give up a page,
          (the default value) say Y.
 
+choice
+       prompt "Kernel page size"
+       default PAGE_SIZE_4KB
+
+config PAGE_SIZE_4KB
+       bool "4kB"
+       help
+         This is the default page size used by all SuperH CPUs.
+
+config PAGE_SIZE_8KB
+       bool "8kB"
+       depends on EXPERIMENTAL && X2TLB
+       help
+         This enables 8kB pages as supported by SH-X2 and later MMUs.
+
+config PAGE_SIZE_64KB
+       bool "64kB"
+       depends on EXPERIMENTAL && CPU_SH4
+       help
+         This enables support for 64kB pages, possible on all SH-4
+         CPUs and later. Highly experimental, not recommended.
+
+endchoice
+
 choice
        prompt "HugeTLB page size"
        depends on HUGETLB_PAGE && CPU_SH4 && MMU
        default HUGETLB_PAGE_SIZE_64K
 
 config HUGETLB_PAGE_SIZE_64K
-       bool "64K"
+       bool "64kB"
+
+config HUGETLB_PAGE_SIZE_256K
+       bool "256kB"
+       depends on X2TLB
 
 config HUGETLB_PAGE_SIZE_1MB
        bool "1MB"
 
+config HUGETLB_PAGE_SIZE_4MB
+       bool "4MB"
+       depends on X2TLB
+
+config HUGETLB_PAGE_SIZE_64MB
+       bool "64MB"
+       depends on X2TLB
+
 endchoice
 
 source "mm/Kconfig"