Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...

[pandora-kernel.git] / arch / sh / kernel / cpu / sh4a / setup-sh7724.c

diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 31e3451..e7fa2a9 100644 (file)
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -21,22 +21,189 @@
 #include <linux/sh_timer.h>
 #include <linux/io.h>
 #include <linux/notifier.h>
+
 #include <asm/suspend.h>
 #include <asm/clock.h>
-#include <asm/dma-sh.h>
+#include <asm/dmaengine.h>
 #include <asm/mmzone.h>
+
+#include <cpu/dma-register.h>
 #include <cpu/sh7724.h>
 
 /* DMA */
-static struct sh_dmae_pdata dma_platform_data = {
-       .mode = SHDMA_DMAOR1,
+static struct sh_dmae_channel sh7724_dmae0_channels[] = {
+       {
+               .offset = 0,
+               .dmars = 0,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x10,
+               .dmars = 0,
+               .dmars_bit = 8,
+       }, {
+               .offset = 0x20,
+               .dmars = 4,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x30,
+               .dmars = 4,
+               .dmars_bit = 8,
+       }, {
+               .offset = 0x50,
+               .dmars = 8,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x60,
+               .dmars = 8,
+               .dmars_bit = 8,
+       }
+};
+
+static struct sh_dmae_channel sh7724_dmae1_channels[] = {
+       {
+               .offset = 0,
+               .dmars = 0,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x10,
+               .dmars = 0,
+               .dmars_bit = 8,
+       }, {
+               .offset = 0x20,
+               .dmars = 4,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x30,
+               .dmars = 4,
+               .dmars_bit = 8,
+       }, {
+               .offset = 0x50,
+               .dmars = 8,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x60,
+               .dmars = 8,
+               .dmars_bit = 8,
+       }
+};
+
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+       .channel        = sh7724_dmae0_channels,
+       .channel_num    = ARRAY_SIZE(sh7724_dmae0_channels),
+       .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+       .ts_low_mask    = CHCR_TS_LOW_MASK,
+       .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+       .ts_high_mask   = CHCR_TS_HIGH_MASK,
+       .ts_shift       = ts_shift,
+       .ts_shift_num   = ARRAY_SIZE(ts_shift),
+       .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+       .channel        = sh7724_dmae1_channels,
+       .channel_num    = ARRAY_SIZE(sh7724_dmae1_channels),
+       .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+       .ts_low_mask    = CHCR_TS_LOW_MASK,
+       .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+       .ts_high_mask   = CHCR_TS_HIGH_MASK,
+       .ts_shift       = ts_shift,
+       .ts_shift_num   = ARRAY_SIZE(ts_shift),
+       .dmaor_init     = DMAOR_INIT,
+};
+
+/* Resource order important! */
+static struct resource sh7724_dmae0_resources[] = {
+       {
+               /* Channel registers and DMAOR */
+               .start  = 0xfe008020,
+               .end    = 0xfe00808f,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* DMARSx */
+               .start  = 0xfe009000,
+               .end    = 0xfe00900b,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* DMA error IRQ */
+               .start  = 78,
+               .end    = 78,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channels 0-3 */
+               .start  = 48,
+               .end    = 51,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channels 4-5 */
+               .start  = 76,
+               .end    = 77,
+               .flags  = IORESOURCE_IRQ,
+       },
 };
 
-static struct platform_device dma_device = {
-       .name   = "sh-dma-engine",
-       .id             = -1,
-       .dev    = {
-               .platform_data  = &dma_platform_data,
+/* Resource order important! */
+static struct resource sh7724_dmae1_resources[] = {
+       {
+               /* Channel registers and DMAOR */
+               .start  = 0xfdc08020,
+               .end    = 0xfdc0808f,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* DMARSx */
+               .start  = 0xfdc09000,
+               .end    = 0xfdc0900b,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* DMA error IRQ */
+               .start  = 74,
+               .end    = 74,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channels 0-3 */
+               .start  = 40,
+               .end    = 43,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channels 4-5 */
+               .start  = 72,
+               .end    = 73,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device dma0_device = {
+       .name           = "sh-dma-engine",
+       .id             = 0,
+       .resource       = sh7724_dmae0_resources,
+       .num_resources  = ARRAY_SIZE(sh7724_dmae0_resources),
+       .dev            = {
+               .platform_data  = &dma0_platform_data,
+       },
+       .archdata = {
+               .hwblk_id = HWBLK_DMAC0,
+       },
+};
+
+static struct platform_device dma1_device = {
+       .name           = "sh-dma-engine",
+       .id             = 1,
+       .resource       = sh7724_dmae1_resources,
+       .num_resources  = ARRAY_SIZE(sh7724_dmae1_resources),
+       .dev            = {
+               .platform_data  = &dma1_platform_data,
+       },
+       .archdata = {
+               .hwblk_id = HWBLK_DMAC1,
        },
 };
 
@@ -663,7 +830,8 @@ static struct platform_device *sh7724_devices[] __initdata = {
        &tmu3_device,
        &tmu4_device,
        &tmu5_device,
-       &dma_device,
+       &dma0_device,
+       &dma1_device,
        &rtc_device,
        &iic0_device,
        &iic1_device,