sh: rework ipr code

[pandora-kernel.git] / arch / sh / kernel / cpu / sh4 / setup-sh7750.c

diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index cbac276..da153bc 100644 (file)
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -46,11 +46,13 @@ static struct platform_device rtc_device = {
 
 static struct plat_sci_port sci_platform_data[] = {
        {
+#ifndef CONFIG_SH_RTS7751R2D
                .mapbase        = 0xffe00000,
                .flags          = UPF_BOOT_AUTOCONF,
                .type           = PORT_SCI,
                .irqs           = { 23, 24, 25, 0 },
        }, {
+#endif
                .mapbase        = 0xffe80000,
                .flags          = UPF_BOOT_AUTOCONF,
                .type           = PORT_SCIF,
@@ -80,7 +82,7 @@ static int __init sh7750_devices_setup(void)
 }
 __initcall(sh7750_devices_setup);
 
-static struct ipr_data sh7750_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
        /* IRQ, IPR-idx, shift, priority */
        { 16, 0, 12, 2 }, /* TMU0 TUNI*/
        { 17, 0, 12, 2 }, /* TMU1 TUNI */
@@ -101,10 +103,30 @@ static struct ipr_data sh7750_ipr_map[] = {
        { 35, 2,  8, 7 }, /* DMAC DMTE1 */
        { 36, 2,  8, 7 }, /* DMAC DMTE2 */
        { 37, 2,  8, 7 }, /* DMAC DMTE3 */
-       { 28, 2,  8, 7 }, /* DMAC DMAE */
+       { 38, 2,  8, 7 }, /* DMAC DMAE */
+};
+
+static unsigned long ipr_offsets[] = {
+       0xffd00004UL,   /* 0: IPRA */
+       0xffd00008UL,   /* 1: IPRB */
+       0xffd0000cUL,   /* 2: IPRC */
+       0xffd00010UL,   /* 3: IPRD */
 };
 
-static struct ipr_data sh7751_ipr_map[] = {
+static struct ipr_desc ipr_irq_desc = {
+       .ipr_offsets    = ipr_offsets,
+       .nr_offsets     = ARRAY_SIZE(ipr_offsets),
+
+       .ipr_data       = ipr_irq_table,
+       .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
+
+       .chip = {
+               .name   = "IPR-sh7750",
+       },
+};
+
+#ifdef CONFIG_CPU_SUBTYPE_SH7751
+static struct ipr_data ipr_irq_table_sh7751[] = {
        { 44, 2,  8, 7 }, /* DMAC DMTE4 */
        { 45, 2,  8, 7 }, /* DMAC DMTE5 */
        { 46, 2,  8, 7 }, /* DMAC DMTE6 */
@@ -116,19 +138,25 @@ static struct ipr_data sh7751_ipr_map[] = {
        /*{ 76, INTPRI00, 12, ? },*/ /* TMU4 TUNI */
 };
 
-static unsigned long ipr_offsets[] = {
-       0xffd00004UL,   /* 0: IPRA */
-       0xffd00008UL,   /* 1: IPRB */
-       0xffd0000cUL,   /* 2: IPRC */
-       0xffd00010UL,   /* 3: IPRD */
+static struct ipr_desc ipr_irq_desc_sh7751 = {
+       .ipr_offsets    = ipr_offsets,
+       .nr_offsets     = ARRAY_SIZE(ipr_offsets),
+
+       .ipr_data       = ipr_irq_table_sh7751,
+       .nr_irqs        = ARRAY_SIZE(ipr_irq_table_sh7751),
+
+       .chip = {
+               .name   = "IPR-sh7751",
+       },
 };
+#endif
 
-/* given the IPR index return the address of the IPR register */
-unsigned int map_ipridx_to_addr(int idx)
+void __init init_IRQ_ipr(void)
 {
-       if (idx >= ARRAY_SIZE(ipr_offsets))
-               return 0;
-       return ipr_offsets[idx];
+       register_ipr_controller(&ipr_irq_desc);
+#ifdef CONFIG_CPU_SUBTYPE_SH7751
+       register_ipr_controller(&ipr_irq_desc_sh7751);
+#endif
 }
 
 #define INTC_ICR       0xffd00000UL
@@ -139,11 +167,3 @@ void ipr_irq_enable_irlm(void)
 {
        ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
 }
-
-void __init init_IRQ_ipr()
-{
-       make_ipr_irq(sh7750_ipr_map, ARRAY_SIZE(sh7750_ipr_map));
-#ifdef CONFIG_CPU_SUBTYPE_SH7751
-       make_ipr_irq(sh7751_ipr_map, ARRAY_SIZE(sh7751_ipr_map));
-#endif
-}