.name = "CMT0",
.channel_offset = 0x02,
.timer_bit = 0,
- .clk = "module_clk",
+ .clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
- .clk = "module_clk",
+ .clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
- .clk = "module_clk",
+ .clk = "peripheral_clk",
.clockevent_rating = 200,
};
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
- .clk = "module_clk",
+ .clk = "peripheral_clk",
.clockevent_rating = 200,
};
return platform_add_devices(sh7203_devices,
ARRAY_SIZE(sh7203_devices));
}
-__initcall(sh7203_devices_setup);
+arch_initcall(sh7203_devices_setup);
void __init plat_irq_setup(void)
{