#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/input.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
+#include <linux/i2c.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
+#include <asm/migor.h>
/* Address IRQ Size Bus Description
* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
static struct resource smc91x_eth_resources[] = {
[0] = {
- .name = "smc91x-regs" ,
- .start = P2SEGADDR(0x10000300),
- .end = P2SEGADDR(0x1000030f),
+ .name = "SMC91C111" ,
+ .start = 0x10000300,
+ .end = 0x1000030f,
.flags = IORESOURCE_MEM,
},
[1] = {
},
};
+static struct mtd_partition migor_nor_flash_partitions[] =
+{
+ {
+ .name = "uboot",
+ .offset = 0,
+ .size = (1 * 1024 * 1024),
+ .mask_flags = MTD_WRITEABLE, /* Read-only */
+ },
+ {
+ .name = "rootfs",
+ .offset = MTDPART_OFS_APPEND,
+ .size = (15 * 1024 * 1024),
+ },
+ {
+ .name = "other",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data migor_nor_flash_data = {
+ .width = 2,
+ .parts = migor_nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
+};
+
+static struct resource migor_nor_flash_resources[] = {
+ [0] = {
+ .name = "NOR Flash",
+ .start = 0x00000000,
+ .end = 0x03ffffff,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device migor_nor_flash_device = {
+ .name = "physmap-flash",
+ .resource = migor_nor_flash_resources,
+ .num_resources = ARRAY_SIZE(migor_nor_flash_resources),
+ .dev = {
+ .platform_data = &migor_nor_flash_data,
+ },
+};
+
+static struct mtd_partition migor_nand_flash_partitions[] = {
+ {
+ .name = "nanddata1",
+ .offset = 0x0,
+ .size = 512 * 1024 * 1024,
+ },
+ {
+ .name = "nanddata2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024 * 1024,
+ },
+};
+
+static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl)
+{
+ struct nand_chip *chip = mtd->priv;
+
+ if (cmd == NAND_CMD_NONE)
+ return;
+
+ if (ctrl & NAND_CLE)
+ writeb(cmd, chip->IO_ADDR_W + 0x00400000);
+ else if (ctrl & NAND_ALE)
+ writeb(cmd, chip->IO_ADDR_W + 0x00800000);
+ else
+ writeb(cmd, chip->IO_ADDR_W);
+}
+
+static int migor_nand_flash_ready(struct mtd_info *mtd)
+{
+ return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
+}
+
+struct platform_nand_data migor_nand_flash_data = {
+ .chip = {
+ .nr_chips = 1,
+ .partitions = migor_nand_flash_partitions,
+ .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
+ .chip_delay = 20,
+ .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
+ },
+ .ctrl = {
+ .dev_ready = migor_nand_flash_ready,
+ .cmd_ctrl = migor_nand_flash_cmd_ctl,
+ },
+};
+
+static struct resource migor_nand_flash_resources[] = {
+ [0] = {
+ .name = "NAND Flash",
+ .start = 0x18000000,
+ .end = 0x18ffffff,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device migor_nand_flash_device = {
+ .name = "gen_nand",
+ .resource = migor_nand_flash_resources,
+ .num_resources = ARRAY_SIZE(migor_nand_flash_resources),
+ .dev = {
+ .platform_data = &migor_nand_flash_data,
+ }
+};
+
static struct platform_device *migor_devices[] __initdata = {
&smc91x_eth_device,
&sh_keysc_device,
+ &migor_nor_flash_device,
+ &migor_nand_flash_device,
+};
+
+static struct i2c_board_info __initdata migor_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("rtc-rs5c372", 0x32),
+ .type = "rs5c372b",
+ },
+ {
+ I2C_BOARD_INFO("migor_ts", 0x51),
+ .irq = 38, /* IRQ6 */
+ },
};
static int __init migor_devices_setup(void)
{
+ i2c_register_board_info(0, migor_i2c_devices,
+ ARRAY_SIZE(migor_i2c_devices));
+
return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
}
__initcall(migor_devices_setup);
-#define PORT_PJCR 0xA4050110UL
-#define PORT_PSELA 0xA405014EUL
-#define PORT_PYCR 0xA405014AUL
-#define PORT_PZCR 0xA405014CUL
-#define PORT_HIZCRA 0xA4050158UL
-#define PORT_HIZCRC 0xA405015CUL
-#define MSTPCR2 0xA4150038UL
-
static void __init migor_setup(char **cmdline_p)
{
/* SMC91C111 - Enable IRQ0 */
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2);
+
+ /* NAND Flash */
+ ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
+ ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
+ BSC_CS6ABCR);
+
+ /* I2C */
+ ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1);
+
+ /* Touch Panel - Enable IRQ6 */
+ ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
+ ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
+ ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
}
static struct sh_machine_vector mv_migor __initmv = {