Pull swiotlb-size into release branch

[pandora-kernel.git] / arch / s390 / kernel / head64.S

diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 8e2caf9..9a8263a 100644 (file)
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -344,10 +344,32 @@ iplstart:
        bno   .Lnoreset
         la    %r2,.Lreset              
         lhi   %r3,26
-        .long 0x83230008
+       diag  %r2,%r3,8
+       la    %r5,.Lirb
+       stsch 0(%r5)                           # check if irq is pending
+       tm    30(%r5),0x0f                     # by verifying if any of the
+       bnz   .Lwaitforirq                     # activity or status control
+       tm    31(%r5),0xff                     # bits is set in the schib
+       bz    .Lnoreset
+.Lwaitforirq:
+       mvc   0x78(8),.Lrdrnewpsw              # set up IO interrupt psw
+.Lwaitrdrirq:
+       lpsw  .Lrdrwaitpsw
+.Lrdrint:
+       c     %r1,0xb8                         # compare subchannel number
+       bne   .Lwaitrdrirq
+       la    %r5,.Lirb
+       tsch  0(%r5)
 .Lnoreset:
+       b     .Lnoload
+
+       .align 8
+.Lrdrnewpsw:
+       .long  0x00080000,0x80000000+.Lrdrint
+.Lrdrwaitpsw:
+       .long  0x020a0000,0x80000000+.Lrdrint
 #endif
-       
+
 #
 # everything loaded, go for it
 #
@@ -643,10 +665,8 @@ startup:basr  %r13,0                     # get base
 #
        la     %r1,0f-.LPG1(%r13)       # set program check address
        stg    %r1,__LC_PGM_NEW_PSW+8
-       mvc    __LC_DIAG44_OPCODE(8),.Lnop-.LPG1(%r13)
        diag   0,0,0x44                 # test diag 0x44
        oi     7(%r12),32               # set diag44 flag
-       mvc    __LC_DIAG44_OPCODE(8),.Ldiag44-.LPG1(%r13)
 0:     
 
 #
@@ -687,7 +707,6 @@ startup:basr  %r13,0                     # get base
 .L4malign:.quad 0xffffffffffc00000
 .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
 .Lnop: .long  0x07000700
-.Ldiag44:.long 0x83000044
 
        .org PARMAREA-64
 .Lduct:        .long 0,0,0,0,0,0,0,0
@@ -750,7 +769,7 @@ _stext:     basr  %r13,0                    # get base
 
 # check control registers
         stctg  %c0,%c15,0(%r15)
-       oi     6(%r15),0x20             # enable sigp external interrupts
+       oi     6(%r15),0x40             # enable sigp emergency signal
        oi     4(%r15),0x10             # switch on low address proctection
         lctlg  %c0,%c15,0(%r15)