Merge ../torvalds-2.6/

[pandora-kernel.git] / arch / ppc64 / kernel / head.S

diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index c7462fa..58c3147 100644 (file)
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -30,7 +30,7 @@
 #include <asm/mmu.h>
 #include <asm/systemcfg.h>
 #include <asm/ppc_asm.h>
-#include <asm/offsets.h>
+#include <asm/asm-offsets.h>
 #include <asm/bug.h>
 #include <asm/cputable.h>
 #include <asm/setup.h>
@@ -96,12 +96,12 @@ END_FTR_SECTION(0, 1)
        .llong hvReleaseData-KERNELBASE
 
        /*
-        * At offset 0x28 and 0x30 are offsets to the msChunks
+        * At offset 0x28 and 0x30 are offsets to the mschunks_map
         * array (used by the iSeries LPAR debugger to do translation
         * between physical addresses and absolute addresses) and
         * to the pidhash table (also used by the debugger)
         */
-       .llong msChunks-KERNELBASE
+       .llong mschunks_map-KERNELBASE
        .llong 0        /* pidhash-KERNELBASE SFRXXX */
 
        /* Offset 0x38 - Pointer to start of embedded System.map */
@@ -1269,7 +1269,21 @@ initial_stab:
        .= 0x7000
        .globl fwnmi_data_area
 fwnmi_data_area:
-       .space  PAGE_SIZE
+
+       /* iSeries does not use the FWNMI stuff, so it is safe to put
+        * this here, even if we later allow kernels that will boot on
+        * both pSeries and iSeries */
+#ifdef CONFIG_PPC_ISERIES
+        . = LPARMAP_PHYS
+#include "lparmap.s"
+/*
+ * This ".text" is here for old compilers that generate a trailing
+ * .note section when compiling .c files to .s
+ */
+       .text
+#endif /* CONFIG_PPC_ISERIES */
+
+        . = 0x8000
 
 /*
  * On pSeries, secondary processors spin in the following code.
@@ -1632,8 +1646,9 @@ _GLOBAL(__secondary_start)
 #else
        /* set the ASR */
        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg         */
+       ld      r3,0(r3)
        lwz     r3,PLATFORM(r3)         /* r3 = platform flags           */
-       cmpldi  r3,PLATFORM_PSERIES_LPAR
+       andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
        bne     98f
        mfspr   r3,PVR
        srwi    r3,r3,16
@@ -1795,8 +1810,9 @@ _STATIC(start_here_multiplatform)
        ld      r3,PACASTABREAL(r13)
        ori     r4,r3,1                 /* turn on valid bit             */
        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
+       ld      r3,0(r3)
        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
-       cmpldi  r3,PLATFORM_PSERIES_LPAR
+       andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
        bne     98f
        mfspr   r3,PVR
        srwi    r3,r3,16
@@ -1814,9 +1830,10 @@ _STATIC(start_here_multiplatform)
 99:
        /* Set SDR1 (hash table pointer) */
        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
+       ld      r3,0(r3)
        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
        /* Test if bit 0 is set (LPAR bit) */
-       andi.   r3,r3,0x1
+       andi.   r3,r3,PLATFORM_LPAR
        bne     98f
        LOADADDR(r6,_SDR1)              /* Only if NOT LPAR */
        sub     r6,r6,r26
@@ -1971,20 +1988,19 @@ _GLOBAL(smp_release_cpus)
 
 /*
  * We put a few things here that have to be page-aligned.
- * This stuff goes at the beginning of the data segment,
- * which is page-aligned.
+ * This stuff goes at the beginning of the bss, which is page-aligned.
  */
-       .data
+       .section ".bss"
+
        .align  12
-       .globl  sdata
-sdata:
+
        .globl  empty_zero_page
 empty_zero_page:
-       .space  4096
+       .space  PAGE_SIZE
 
        .globl  swapper_pg_dir
 swapper_pg_dir:
-       .space  4096
+       .space  PAGE_SIZE
 
 /*
  * This space gets a copy of optional info passed to us by the bootstrap