Merge ../torvalds-2.6/

[pandora-kernel.git] / arch / ppc64 / kernel / head.S

diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 1cc9f20..58c3147 100644 (file)
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -23,8 +23,6 @@
  *  2 of the License, or (at your option) any later version.
  */
 
-#define SECONDARY_PROCESSORS
-
 #include <linux/config.h>
 #include <linux/threads.h>
 #include <asm/processor.h>
@@ -32,7 +30,7 @@
 #include <asm/mmu.h>
 #include <asm/systemcfg.h>
 #include <asm/ppc_asm.h>
-#include <asm/offsets.h>
+#include <asm/asm-offsets.h>
 #include <asm/bug.h>
 #include <asm/cputable.h>
 #include <asm/setup.h>
@@ -43,11 +41,6 @@
 #define DO_SOFT_DISABLE
 #endif
 
-/*
- * hcall interface to pSeries LPAR
- */
-#define H_SET_ASR      0x30
-
 /*
  * We layout physical memory as follows:
  * 0x0000 - 0x00ff : Secondary processor spin code
@@ -103,12 +96,12 @@ END_FTR_SECTION(0, 1)
        .llong hvReleaseData-KERNELBASE
 
        /*
-        * At offset 0x28 and 0x30 are offsets to the msChunks
+        * At offset 0x28 and 0x30 are offsets to the mschunks_map
         * array (used by the iSeries LPAR debugger to do translation
         * between physical addresses and absolute addresses) and
         * to the pidhash table (also used by the debugger)
         */
-       .llong msChunks-KERNELBASE
+       .llong mschunks_map-KERNELBASE
        .llong 0        /* pidhash-KERNELBASE SFRXXX */
 
        /* Offset 0x38 - Pointer to start of embedded System.map */
@@ -155,7 +148,7 @@ _GLOBAL(__secondary_hold)
        std     r24,__secondary_hold_acknowledge@l(0)
        sync
 
-       /* All secondary cpu's wait here until told to start. */
+       /* All secondary cpus wait here until told to start. */
 100:   ld      r4,__secondary_hold_spinloop@l(0)
        cmpdi   0,r4,1
        bne     100b
@@ -629,9 +622,7 @@ system_reset_iSeries:
 
        cmpwi   0,r23,0
        beq     iSeries_secondary_smp_loop      /* Loop until told to go */
-#ifdef SECONDARY_PROCESSORS
        bne     .__secondary_start              /* Loop until told to go */
-#endif
 iSeries_secondary_smp_loop:
        /* Let the Hypervisor know we are alive */
        /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
@@ -712,8 +703,8 @@ machine_check_common:
  * R9 contains the saved CR, r13 points to the paca,
  * r10 contains the (bad) kernel stack pointer,
  * r11 and r12 contain the saved SRR0 and SRR1.
- * We switch to using the paca guard page as an emergency stack,
- * save the registers there, and call kernel_bad_stack(), which panics.
+ * We switch to using an emergency stack, save the registers there,
+ * and call kernel_bad_stack(), which panics.
  */
 bad_stack:
        ld      r1,PACAEMERGSP(r13)
@@ -1278,7 +1269,21 @@ initial_stab:
        .= 0x7000
        .globl fwnmi_data_area
 fwnmi_data_area:
-       .space  PAGE_SIZE
+
+       /* iSeries does not use the FWNMI stuff, so it is safe to put
+        * this here, even if we later allow kernels that will boot on
+        * both pSeries and iSeries */
+#ifdef CONFIG_PPC_ISERIES
+        . = LPARMAP_PHYS
+#include "lparmap.s"
+/*
+ * This ".text" is here for old compilers that generate a trailing
+ * .note section when compiling .c files to .s
+ */
+       .text
+#endif /* CONFIG_PPC_ISERIES */
+
+        . = 0x8000
 
 /*
  * On pSeries, secondary processors spin in the following code.
@@ -1312,7 +1317,7 @@ _GLOBAL(pSeries_secondary_smp_init)
        b       .kexec_wait             /* next kernel might do better   */
 
 2:     mtspr   SPRG3,r13               /* Save vaddr of paca in SPRG3   */
-       /* From now on, r24 is expected to be logica cpuid */
+       /* From now on, r24 is expected to be logical cpuid */
        mr      r24,r5
 3:     HMT_LOW
        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor should */
@@ -1325,9 +1330,7 @@ _GLOBAL(pSeries_secondary_smp_init)
 
        cmpwi   0,r23,0
 #ifdef CONFIG_SMP
-#ifdef SECONDARY_PROCESSORS
        bne     .__secondary_start
-#endif
 #endif
        b       3b                      /* Loop until told to go         */
 
@@ -1643,8 +1646,9 @@ _GLOBAL(__secondary_start)
 #else
        /* set the ASR */
        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg         */
+       ld      r3,0(r3)
        lwz     r3,PLATFORM(r3)         /* r3 = platform flags           */
-       cmpldi  r3,PLATFORM_PSERIES_LPAR
+       andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
        bne     98f
        mfspr   r3,PVR
        srwi    r3,r3,16
@@ -1806,8 +1810,9 @@ _STATIC(start_here_multiplatform)
        ld      r3,PACASTABREAL(r13)
        ori     r4,r3,1                 /* turn on valid bit             */
        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
+       ld      r3,0(r3)
        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
-       cmpldi  r3,PLATFORM_PSERIES_LPAR
+       andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
        bne     98f
        mfspr   r3,PVR
        srwi    r3,r3,16
@@ -1825,9 +1830,10 @@ _STATIC(start_here_multiplatform)
 99:
        /* Set SDR1 (hash table pointer) */
        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
+       ld      r3,0(r3)
        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
        /* Test if bit 0 is set (LPAR bit) */
-       andi.   r3,r3,0x1
+       andi.   r3,r3,PLATFORM_LPAR
        bne     98f
        LOADADDR(r6,_SDR1)              /* Only if NOT LPAR */
        sub     r6,r6,r26
@@ -1982,20 +1988,19 @@ _GLOBAL(smp_release_cpus)
 
 /*
  * We put a few things here that have to be page-aligned.
- * This stuff goes at the beginning of the data segment,
- * which is page-aligned.
+ * This stuff goes at the beginning of the bss, which is page-aligned.
  */
-       .data
+       .section ".bss"
+
        .align  12
-       .globl  sdata
-sdata:
+
        .globl  empty_zero_page
 empty_zero_page:
-       .space  4096
+       .space  PAGE_SIZE
 
        .globl  swapper_pg_dir
 swapper_pg_dir:
-       .space  4096
+       .space  PAGE_SIZE
 
 /*
  * This space gets a copy of optional info passed to us by the bootstrap