Pull bugzilla-8709 into release branch

[pandora-kernel.git] / arch / powerpc / platforms / 85xx / mpc85xx_cds.c

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 81b7062..2d4cb78 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -69,6 +69,37 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
                return PCIBIOS_SUCCESSFUL;
 }
 
+static void mpc85xx_cds_restart(char *cmd)
+{
+       struct pci_dev *dev;
+       u_char tmp;
+
+       if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
+                                       NULL))) {
+
+               /* Use the VIA Super Southbridge to force a PCI reset */
+               pci_read_config_byte(dev, 0x47, &tmp);
+               pci_write_config_byte(dev, 0x47, tmp | 1);
+
+               /* Flush the outbound PCI write queues */
+               pci_read_config_byte(dev, 0x47, &tmp);
+
+               /*
+                *  At this point, the harware reset should have triggered.
+                *  However, if it doesn't work for some mysterious reason,
+                *  just fall through to the default reset below.
+                */
+
+               pci_dev_put(dev);
+       }
+
+       /*
+        *  If we can't find the VIA chip (maybe the P2P bridge is disabled)
+        *  or the VIA chip reset didn't work, just use the default reset.
+        */
+       mpc85xx_restart(NULL);
+}
+
 static void __init mpc85xx_cds_pci_irq_fixup(struct pci_dev *dev)
 {
        u_char c;
@@ -98,7 +129,7 @@ static void __init mpc85xx_cds_pci_irq_fixup(struct pci_dev *dev)
                /* There are two USB controllers.
                 * Identify them by functon number
                 */
-                       if (PCI_FUNC(dev->devfn))
+                       if (PCI_FUNC(dev->devfn) == 3)
                                dev->irq = 11;
                        else
                                dev->irq = 10;
@@ -152,10 +183,6 @@ static void __init mpc85xx_cds_pic_init(void)
        struct mpic *mpic;
        struct resource r;
        struct device_node *np = NULL;
-#if defined(CONFIG_PPC_I8259) && defined(CONFIG_PCI)
-       struct device_node *cascade_node = NULL;
-       int cascade_irq;
-#endif
 
        np = of_find_node_by_type(np, "open-pic");
 
@@ -179,8 +206,19 @@ static void __init mpc85xx_cds_pic_init(void)
        of_node_put(np);
 
        mpic_init(mpic);
+}
 
 #if defined(CONFIG_PPC_I8259) && defined(CONFIG_PCI)
+static int mpc85xx_cds_8259_attach(void)
+{
+       int ret;
+       struct device_node *np = NULL;
+       struct device_node *cascade_node = NULL;
+       int cascade_irq;
+
+       if (!machine_is(mpc85xx_cds))
+               return 0;
+
        /* Initialize the i8259 controller */
        for_each_node_by_type(np, "interrupt-controller")
                if (of_device_is_compatible(np, "chrp,iic")) {
@@ -190,13 +228,13 @@ static void __init mpc85xx_cds_pic_init(void)
 
        if (cascade_node == NULL) {
                printk(KERN_DEBUG "Could not find i8259 PIC\n");
-               return;
+               return -ENODEV;
        }
 
        cascade_irq = irq_of_parse_and_map(cascade_node, 0);
        if (cascade_irq == NO_IRQ) {
                printk(KERN_ERR "Failed to map cascade interrupt\n");
-               return;
+               return -ENXIO;
        }
 
        i8259_init(cascade_node, 0);
@@ -208,14 +246,21 @@ static void __init mpc85xx_cds_pic_init(void)
         *  disabled when the last user of the shared IRQ line frees their
         *  interrupt.
         */
-       if (setup_irq(cascade_irq, &mpc85xxcds_8259_irqaction))
+       if ((ret = setup_irq(cascade_irq, &mpc85xxcds_8259_irqaction))) {
                printk(KERN_ERR "Failed to setup cascade interrupt\n");
-       else
-               /* Success. Connect our low-level cascade handler. */
-               set_irq_handler(cascade_irq, mpc85xx_8259_cascade_handler);
-#endif /* CONFIG_PPC_I8259 */
+               return ret;
+       }
+
+       /* Success. Connect our low-level cascade handler. */
+       set_irq_handler(cascade_irq, mpc85xx_8259_cascade_handler);
+
+       return 0;
 }
 
+device_initcall(mpc85xx_cds_8259_attach);
+
+#endif /* CONFIG_PPC_I8259 */
+
 /*
  * Setup the architecture
  */
@@ -255,10 +300,10 @@ static void __init mpc85xx_cds_setup_arch(void)
        for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) {
                struct resource rsrc;
                of_address_to_resource(np, 0, &rsrc);
-               if ((rsrc.start & 0xfffff) == 0x9000)
-                       fsl_add_bridge(np, 0);
-               else
+               if ((rsrc.start & 0xfffff) == 0x8000)
                        fsl_add_bridge(np, 1);
+               else
+                       fsl_add_bridge(np, 0);
        }
        ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup;
        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
@@ -304,8 +349,12 @@ define_machine(mpc85xx_cds) {
        .init_IRQ       = mpc85xx_cds_pic_init,
        .show_cpuinfo   = mpc85xx_cds_show_cpuinfo,
        .get_irq        = mpic_get_irq,
+#ifdef CONFIG_PCI
+       .restart        = mpc85xx_cds_restart,
+       .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#else
        .restart        = mpc85xx_restart,
+#endif
        .calibrate_decr = generic_calibrate_decr,
        .progress       = udbg_progress,
-       .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 };