[POWERPC] Move PCI nodes to be sibilings with SOC nodes

[pandora-kernel.git] / arch / powerpc / boot / dts / mpc8560ads.dts

diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 21ccaaa..5577ec1 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -30,7 +30,6 @@
                        timebase-frequency = <04ead9a0>;
                        bus-frequency = <13ab6680>;
                        clock-frequency = <312c8040>;
-                       32-bit;
                };
        };
 
@@ -42,7 +41,6 @@
        soc8560@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
@@ -132,109 +130,17 @@
                        phy-handle = <&phy1>;
                };
 
-               pci@8000 {
-                       #interrupt-cells = <1>;
-                       #size-cells = <2>;
-                       #address-cells = <3>;
-                       compatible = "85xx";
-                       device_type = "pci";
-                       reg = <8000 1000>;
-                       clock-frequency = <3f940aa>;
-                       interrupt-map-mask = <f800 0 0 7>;
-                       interrupt-map = <
-
-                                       /* IDSEL 0x2 */
-                                        1000 0 0 1 &mpic 1 1
-                                        1000 0 0 2 &mpic 2 1
-                                        1000 0 0 3 &mpic 3 1
-                                        1000 0 0 4 &mpic 4 1
-
-                                       /* IDSEL 0x3 */
-                                        1800 0 0 1 &mpic 4 1
-                                        1800 0 0 2 &mpic 1 1
-                                        1800 0 0 3 &mpic 2 1
-                                        1800 0 0 4 &mpic 3 1
-
-                                       /* IDSEL 0x4 */
-                                        2000 0 0 1 &mpic 3 1
-                                        2000 0 0 2 &mpic 4 1
-                                        2000 0 0 3 &mpic 1 1
-                                        2000 0 0 4 &mpic 2 1
-
-                                       /* IDSEL 0x5  */
-                                        2800 0 0 1 &mpic 2 1
-                                        2800 0 0 2 &mpic 3 1
-                                        2800 0 0 3 &mpic 4 1
-                                        2800 0 0 4 &mpic 1 1
-
-                                       /* IDSEL 12 */
-                                        6000 0 0 1 &mpic 1 1
-                                        6000 0 0 2 &mpic 2 1
-                                        6000 0 0 3 &mpic 3 1
-                                        6000 0 0 4 &mpic 4 1
-
-                                       /* IDSEL 13 */
-                                        6800 0 0 1 &mpic 4 1
-                                        6800 0 0 2 &mpic 1 1
-                                        6800 0 0 3 &mpic 2 1
-                                        6800 0 0 4 &mpic 3 1
-
-                                       /* IDSEL 14*/
-                                        7000 0 0 1 &mpic 3 1
-                                        7000 0 0 2 &mpic 4 1
-                                        7000 0 0 3 &mpic 1 1
-                                        7000 0 0 4 &mpic 2 1
-
-                                       /* IDSEL 15 */
-                                        7800 0 0 1 &mpic 2 1
-                                        7800 0 0 2 &mpic 3 1
-                                        7800 0 0 3 &mpic 4 1
-                                        7800 0 0 4 &mpic 1 1
-
-                                       /* IDSEL 18 */
-                                        9000 0 0 1 &mpic 1 1
-                                        9000 0 0 2 &mpic 2 1
-                                        9000 0 0 3 &mpic 3 1
-                                        9000 0 0 4 &mpic 4 1
-
-                                       /* IDSEL 19 */
-                                        9800 0 0 1 &mpic 4 1
-                                        9800 0 0 2 &mpic 1 1
-                                        9800 0 0 3 &mpic 2 1
-                                        9800 0 0 4 &mpic 3 1
-
-                                       /* IDSEL 20 */
-                                        a000 0 0 1 &mpic 3 1
-                                        a000 0 0 2 &mpic 4 1
-                                        a000 0 0 3 &mpic 1 1
-                                        a000 0 0 4 &mpic 2 1
-
-                                       /* IDSEL 21 */
-                                        a800 0 0 1 &mpic 2 1
-                                        a800 0 0 2 &mpic 3 1
-                                        a800 0 0 3 &mpic 4 1
-                                        a800 0 0 4 &mpic 1 1>;
-
-                       interrupt-parent = <&mpic>;
-                       interrupts = <18 2>;
-                       bus-range = <0 0>;
-                       ranges = <02000000 0 80000000 80000000 0 20000000
-                                 01000000 0 00000000 e2000000 0 01000000>;
-               };
-
                mpic: pic@40000 {
                        interrupt-controller;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        device_type = "open-pic";
                };
 
                cpm@e0000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       #interrupt-cells = <2>;
                        device_type = "cpm";
                        model = "CPM2";
                        ranges = <0 0 c0000>;
@@ -249,7 +155,6 @@
                                interrupts = <2e 2>;
                                interrupt-parent = <&mpic>;
                                reg = <90c00 80>;
-                               built-in;
                                device_type = "cpm-pic";
                        };
 
@@ -324,4 +229,94 @@
                        };
                };
        };
+
+       pci@e0008000 {
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+               device_type = "pci";
+               reg = <e0008000 1000>;
+               clock-frequency = <3f940aa>;
+               interrupt-map-mask = <f800 0 0 7>;
+               interrupt-map = <
+
+                               /* IDSEL 0x2 */
+                                1000 0 0 1 &mpic 1 1
+                                1000 0 0 2 &mpic 2 1
+                                1000 0 0 3 &mpic 3 1
+                                1000 0 0 4 &mpic 4 1
+
+                               /* IDSEL 0x3 */
+                                1800 0 0 1 &mpic 4 1
+                                1800 0 0 2 &mpic 1 1
+                                1800 0 0 3 &mpic 2 1
+                                1800 0 0 4 &mpic 3 1
+
+                               /* IDSEL 0x4 */
+                                2000 0 0 1 &mpic 3 1
+                                2000 0 0 2 &mpic 4 1
+                                2000 0 0 3 &mpic 1 1
+                                2000 0 0 4 &mpic 2 1
+
+                               /* IDSEL 0x5  */
+                                2800 0 0 1 &mpic 2 1
+                                2800 0 0 2 &mpic 3 1
+                                2800 0 0 3 &mpic 4 1
+                                2800 0 0 4 &mpic 1 1
+
+                               /* IDSEL 12 */
+                                6000 0 0 1 &mpic 1 1
+                                6000 0 0 2 &mpic 2 1
+                                6000 0 0 3 &mpic 3 1
+                                6000 0 0 4 &mpic 4 1
+
+                               /* IDSEL 13 */
+                                6800 0 0 1 &mpic 4 1
+                                6800 0 0 2 &mpic 1 1
+                                6800 0 0 3 &mpic 2 1
+                                6800 0 0 4 &mpic 3 1
+
+                               /* IDSEL 14*/
+                                7000 0 0 1 &mpic 3 1
+                                7000 0 0 2 &mpic 4 1
+                                7000 0 0 3 &mpic 1 1
+                                7000 0 0 4 &mpic 2 1
+
+                               /* IDSEL 15 */
+                                7800 0 0 1 &mpic 2 1
+                                7800 0 0 2 &mpic 3 1
+                                7800 0 0 3 &mpic 4 1
+                                7800 0 0 4 &mpic 1 1
+
+                               /* IDSEL 18 */
+                                9000 0 0 1 &mpic 1 1
+                                9000 0 0 2 &mpic 2 1
+                                9000 0 0 3 &mpic 3 1
+                                9000 0 0 4 &mpic 4 1
+
+                               /* IDSEL 19 */
+                                9800 0 0 1 &mpic 4 1
+                                9800 0 0 2 &mpic 1 1
+                                9800 0 0 3 &mpic 2 1
+                                9800 0 0 4 &mpic 3 1
+
+                               /* IDSEL 20 */
+                                a000 0 0 1 &mpic 3 1
+                                a000 0 0 2 &mpic 4 1
+                                a000 0 0 3 &mpic 1 1
+                                a000 0 0 4 &mpic 2 1
+
+                               /* IDSEL 21 */
+                                a800 0 0 1 &mpic 2 1
+                                a800 0 0 2 &mpic 3 1
+                                a800 0 0 3 &mpic 4 1
+                                a800 0 0 4 &mpic 1 1>;
+
+               interrupt-parent = <&mpic>;
+               interrupts = <18 2>;
+               bus-range = <0 0>;
+               ranges = <02000000 0 80000000 80000000 0 20000000
+                         01000000 0 00000000 e2000000 0 01000000>;
+       };
 };