Pull bugzilla-5452 into release branch

[pandora-kernel.git] / arch / mips / sibyte / bcm1480 / irq.c

diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index b2a1ba5..e61760b 100644 (file)
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -139,7 +139,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
 #ifdef CONFIG_SMP
 static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
 {
-       int i = 0, old_cpu, cpu, int_on;
+       int i = 0, old_cpu, cpu, int_on, k;
        u64 cur_ints;
        irq_desc_t *desc = irq_desc + irq;
        unsigned long flags;
@@ -165,7 +165,6 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
                irq_dirty -= BCM1480_NR_IRQS_HALF;
        }
 
-       int k;
        for (k=0; k<2; k++) { /* Loop through high and low interrupt mask register */
                cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
                int_on = !(cur_ints & (((u64) 1) << irq_dirty));
@@ -188,9 +187,6 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
 #endif
 
 
-/* Defined in arch/mips/sibyte/bcm1480/irq_handler.S */
-extern void bcm1480_irq_handler(void);
-
 /*****************************************************************************/
 
 static unsigned int startup_bcm1480_irq(unsigned int irq)
@@ -216,6 +212,7 @@ static void ack_bcm1480_irq(unsigned int irq)
 {
        u64 pending;
        unsigned int irq_dirty;
+       int k;
 
        /*
         * If the interrupt was an HT interrupt, now is the time to
@@ -227,7 +224,6 @@ static void ack_bcm1480_irq(unsigned int irq)
        if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) {
                irq_dirty -= BCM1480_NR_IRQS_HALF;
        }
-       int k;
        for (k=0; k<2; k++) { /* Loop through high and low LDT interrupts */
                pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq],
                                                R_BCM1480_IMR_LDT_INTERRUPT_H + (k*BCM1480_IMR_HL_SPACING))));
@@ -423,7 +419,6 @@ void __init arch_init_irq(void)
 #endif
        /* Enable necessary IPs, disable the rest */
        change_c0_status(ST0_IM, imask);
-       set_except_vector(0, bcm1480_irq_handler);
 
 #ifdef CONFIG_KGDB
        if (kgdb_flag) {
@@ -474,3 +469,76 @@ void bcm1480_kgdb_interrupt(struct pt_regs *regs)
 }
 
 #endif         /* CONFIG_KGDB */
+
+static inline int dclz(unsigned long long x)
+{
+       int lz;
+
+       __asm__ (
+       "       .set    push                                            \n"
+       "       .set    mips64                                          \n"
+       "       dclz    %0, %1                                          \n"
+       "       .set    pop                                             \n"
+       : "=r" (lz)
+       : "r" (x));
+
+       return lz;
+}
+
+extern void bcm1480_timer_interrupt(struct pt_regs *regs);
+extern void bcm1480_mailbox_interrupt(struct pt_regs *regs);
+extern void bcm1480_kgdb_interrupt(struct pt_regs *regs);
+
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+       unsigned int pending;
+
+#ifdef CONFIG_SIBYTE_BCM1480_PROF
+       /* Set compare to count to silence count/compare timer interrupts */
+       write_c0_compare(read_c0_count());
+#endif
+
+       pending = read_c0_cause();
+
+#ifdef CONFIG_SIBYTE_BCM1480_PROF
+       if (pending & CAUSEF_IP7)       /* Cpu performance counter interrupt */
+               sbprof_cpu_intr(exception_epc(regs));
+#endif
+
+       if (pending & CAUSEF_IP4)
+               bcm1480_timer_interrupt(regs);
+
+#ifdef CONFIG_SMP
+       if (pending & CAUSEF_IP3)
+               bcm1480_mailbox_interrupt(regs);
+#endif
+
+#ifdef CONFIG_KGDB
+       if (pending & CAUSEF_IP6)
+               bcm1480_kgdb_interrupt(regs);           /* KGDB (uart 1) */
+#endif
+
+       if (pending & CAUSEF_IP2) {
+               unsigned long long mask_h, mask_l;
+               unsigned long base;
+
+               /*
+                * Default...we've hit an IP[2] interrupt, which means we've
+                * got to check the 1480 interrupt registers to figure out what
+                * to do.  Need to detect which CPU we're on, now that
+                * smp_affinity is supported.
+                */
+               base = A_BCM1480_IMR_MAPPER(smp_processor_id());
+               mask_h = __raw_readq(
+                       IOADDR(base + R_BCM1480_IMR_INTERRUPT_STATUS_BASE_H));
+               mask_l = __raw_readq(
+                       IOADDR(base + R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L));
+
+               if (!mask_h) {
+                       if (mask_h ^ 1)
+                               do_IRQ(63 - dclz(mask_h), regs);
+                       else
+                               do_IRQ(127 - dclz(mask_l), regs);
+               }
+       }
+}