Merge branch 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[pandora-kernel.git] / arch / mips / oprofile / op_model_loongson2.c
index 475ff46..fa3bf66 100644 (file)
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2009 Lemote Inc.
  * Author: Yanhua <yanh@lemote.com>
- * Author: Wu Zhangjin <wuzj@lemote.com>
+ * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -47,8 +47,6 @@ static struct loongson2_register_config {
        int cnt1_enabled, cnt2_enabled;
 } reg;
 
-DEFINE_SPINLOCK(sample_lock);
-
 static char *oprofid = "LoongsonPerf";
 static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
 /* Compute all of the registers in preparation for enabling profiling.  */
@@ -115,7 +113,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
        uint64_t counter, counter1, counter2;
        struct pt_regs *regs = get_irq_regs();
        int enabled;
-       unsigned long flags;
 
        /*
         * LOONGSON2 defines two 32-bit performance counters.
@@ -125,7 +122,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
         */
 
        /* Check whether the irq belongs to me */
-       enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN;
+       enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN;
        if (!enabled)
                return IRQ_NONE;
        enabled = reg.cnt1_enabled | reg.cnt2_enabled;
@@ -136,8 +133,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
        counter1 = counter & 0xffffffff;
        counter2 = counter >> 32;
 
-       spin_lock_irqsave(&sample_lock, flags);
-
        if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
                if (reg.cnt1_enabled)
                        oprofile_add_sample(regs, 0);
@@ -149,8 +144,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
                counter2 = reg.reset_counter2;
        }
 
-       spin_unlock_irqrestore(&sample_lock, flags);
-
        write_c0_perfcnt((counter2 << 32) | counter1);
 
        return IRQ_HANDLED;