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MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family.
[pandora-kernel.git]
/
arch
/
mips
/
include
/
asm
/
smp.h
diff --git
a/arch/mips/include/asm/smp.h
b/arch/mips/include/asm/smp.h
index
86557b5
..
40e5ef1
100644
(file)
--- a/
arch/mips/include/asm/smp.h
+++ b/
arch/mips/include/asm/smp.h
@@
-37,6
+37,9
@@
extern int __cpu_logical_map[NR_CPUS];
#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
#define SMP_CALL_FUNCTION 0x2
+/* Octeon - Tell another core to flush its icache */
+#define SMP_ICACHE_FLUSH 0x4
+
extern void asmlinkage smp_bootstrap(void);