static inline void unmask_kn02_irq(unsigned int irq)
{
- volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
+ volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
+ KN02_CSR);
cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));
*csr = cached_kn02_csr;
static inline void mask_kn02_irq(unsigned int irq)
{
- volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
+ volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
+ KN02_CSR);
cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));
*csr = cached_kn02_csr;
void __init init_kn02_irqs(int base)
{
- volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
+ volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
+ KN02_CSR);
unsigned long flags;
int i;
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &kn02_irq_type;
+ irq_desc[i].chip = &kn02_irq_type;
}
kn02_irq_base = base;