{
void __iomem *bootcr;
u32 val;
- u16 chip_id;
int res;
res = ar7_register_uarts();
val = readl(bootcr);
iounmap(bootcr);
if (val & AR7_WDT_HW_ENA) {
- chip_id = ar7_chip_id();
- switch (chip_id) {
- case AR7_CHIP_7100:
- case AR7_CHIP_7200:
- ar7_wdt_res.start = AR7_REGS_WDT;
- break;
- case AR7_CHIP_7300:
+ if (ar7_has_high_vlynq())
ar7_wdt_res.start = UR8_REGS_WDT;
- break;
- default:
- break;
- }
+ else
+ ar7_wdt_res.start = AR7_REGS_WDT;
ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
res = platform_device_register(&ar7_wdt);