Blackfin: standardize DMAC traffic control MMRs & MDMA MMRs

[pandora-kernel.git] / arch / blackfin / mach-bf533 / include / mach / defBF532.h

diff --git a/arch/blackfin/mach-bf533/include/mach/defBF532.h b/arch/blackfin/mach-bf533/include/mach/defBF532.h
index 8e8099b..44415e5 100644 (file)
--- a/arch/blackfin/mach-bf533/include/mach/defBF532.h
+++ b/arch/blackfin/mach-bf533/include/mach/defBF532.h
@@ -182,12 +182,8 @@
 #define EBIU_SDSTAT                    0xFFC00A1C      /* SDRAM Status Register */
 
 /* DMA Traffic controls */
-#define DMA_TC_PER 0xFFC00B0C  /* Traffic Control Periods Register */
-#define DMA_TC_CNT 0xFFC00B10  /* Traffic Control Current Counts Register */
-
-/* Alternate deprecated register names (below) provided for backwards code compatibility */
-#define DMA_TCPER 0xFFC00B0C   /* Traffic Control Periods Register */
-#define DMA_TCCNT 0xFFC00B10   /* Traffic Control Current Counts Register */
+#define DMAC_TC_PER 0xFFC00B0C /* Traffic Control Periods Register */
+#define DMAC_TC_CNT 0xFFC00B10 /* Traffic Control Current Counts Register */
 
 /* DMA Controller (0xFFC00C00 - 0xFFC00FFF) */
 #define DMA0_CONFIG            0xFFC00C08      /* DMA Channel 0 Configuration Register */