Blackfin: unify DMA masks

[pandora-kernel.git] / arch / blackfin / mach-bf527 / include / mach / defBF52x_base.h

diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index da42e9c..8b18b53 100644 (file)
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -1269,33 +1269,6 @@
 
 
 /* **************************  DMA CONTROLLER MASKS  ********************************/
-/* DMAx_CONFIG, MDMA_yy_CONFIG Masks                                                                                           */
-#define DMAEN                  0x0001          /* DMA Channel Enable                                                   */
-#define WNR                            0x0002          /* Channel Direction (W/R*)                                             */
-#define WDSIZE_8               0x0000          /* Transfer Word Size = 8                                               */
-#define WDSIZE_16              0x0004          /* Transfer Word Size = 16                                              */
-#define WDSIZE_32              0x0008          /* Transfer Word Size = 32                                              */
-#define DMA2D                  0x0010          /* DMA Mode (2D/1D*)                                                    */
-#define RESTART                        0x0020          /* DMA Buffer Clear                                                             */
-#define DI_SEL                 0x0040          /* Data Interrupt Timing Select                                 */
-#define DI_EN                  0x0080          /* Data Interrupt Enable                                                */
-#define NDSIZE_0               0x0000          /* Next Descriptor Size = 0 (Stop/Autobuffer)   */
-#define NDSIZE_1               0x0100          /* Next Descriptor Size = 1                                             */
-#define NDSIZE_2               0x0200          /* Next Descriptor Size = 2                                             */
-#define NDSIZE_3               0x0300          /* Next Descriptor Size = 3                                             */
-#define NDSIZE_4               0x0400          /* Next Descriptor Size = 4                                             */
-#define NDSIZE_5               0x0500          /* Next Descriptor Size = 5                                             */
-#define NDSIZE_6               0x0600          /* Next Descriptor Size = 6                                             */
-#define NDSIZE_7               0x0700          /* Next Descriptor Size = 7                                             */
-#define NDSIZE_8               0x0800          /* Next Descriptor Size = 8                                             */
-#define NDSIZE_9               0x0900          /* Next Descriptor Size = 9                                             */
-#define NDSIZE                 0x0900  /* Next Descriptor Size */
-#define DMAFLOW                        0x7000  /* Flow Control */
-#define DMAFLOW_STOP           0x0000          /* Stop Mode                                                                    */
-#define DMAFLOW_AUTO           0x1000          /* Autobuffer Mode                                                              */
-#define DMAFLOW_ARRAY          0x4000          /* Descriptor Array Mode                                                */
-#define DMAFLOW_SMALL          0x6000          /* Small Model Descriptor List Mode                             */
-#define DMAFLOW_LARGE          0x7000          /* Large Model Descriptor List Mode                             */
 
 /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks                                                           */
 #define CTYPE                  0x0040  /* DMA Channel Type Indicator (Memory/Peripheral*)      */
@@ -1313,13 +1286,6 @@
 #define        PMAP_UART1RX    0xA000  /*              UART1 Port Receive DMA                                          */
 #define        PMAP_UART1TX    0xB000  /*              UART1 Port Transmit DMA                                         */
 
-/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks                                           */
-#define DMA_DONE               0x0001  /* DMA Completion Interrupt Status      */
-#define DMA_ERR                        0x0002  /* DMA Error Interrupt Status           */
-#define DFETCH                 0x0004  /* DMA Descriptor Fetch Indicator       */
-#define DMA_RUN                        0x0008  /* DMA Channel Running Indicator        */
-
-
 /*  ************  PARALLEL PERIPHERAL INTERFACE (PPI) MASKS *************/
 /*  PPI_CONTROL Masks                                                                                                  */
 #define PORT_EN                        0x0001          /* PPI Port Enable                                      */