mmc: host: split up sdhci-pxa, create sdhci-pxav3.c

[pandora-kernel.git] / arch / arm / plat-pxa / include / plat / sdhci.h

diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h
index 1ab332e..800ebc1 100644 (file)
--- a/arch/arm/plat-pxa/include/plat/sdhci.h
+++ b/arch/arm/plat-pxa/include/plat/sdhci.h
@@ -15,21 +15,46 @@
 
 /* pxa specific flag */
 /* Require clock free running */
-#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0)
-
+#define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0)
+/* card always wired to host, like on-chip emmc */
+#define PXA_FLAG_CARD_PERMANENT        (1<<1)
 /* Board design supports 8-bit data on SD/SDIO BUS */
 #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2)
 
 /*
  * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
- * @max_speed: the maximum speed supported
- * @quirks: quirks of specific device
  * @flags: flags for platform requirement
+ * @clk_delay_cycles:
+ *     mmp2: each step is roughly 100ps, 5bits width
+ *     pxa910: each step is 1ns, 4bits width
+ * @clk_delay_sel: select clk_delay, used on pxa910
+ *     0: choose feedback clk
+ *     1: choose feedback clk + delay value
+ *     2: choose internal clk
+ * @clk_delay_enable: enable clk_delay or not, used on pxa910
+ * @ext_cd_gpio: gpio pin used for external CD line
+ * @ext_cd_gpio_invert: invert values for external CD gpio line
+ * @max_speed: the maximum speed supported
+ * @host_caps: Standard MMC host capabilities bit field.
+ * @quirks: quirks of platfrom
+ * @pm_caps: pm_caps of platfrom
  */
 struct sdhci_pxa_platdata {
+       unsigned int    flags;
+       unsigned int    clk_delay_cycles;
+       unsigned int    clk_delay_sel;
+       bool            clk_delay_enable;
+       unsigned int    ext_cd_gpio;
+       bool            ext_cd_gpio_invert;
        unsigned int    max_speed;
+       unsigned int    host_caps;
        unsigned int    quirks;
-       unsigned int    flags;
+       unsigned int    pm_caps;
+};
+
+struct sdhci_pxa {
+       u8      clk_enable;
+       u8      power_mode;
 };
 
 #endif /* __PLAT_PXA_SDHCI_H */