ARM: imx: dynamically register fec devices

[pandora-kernel.git] / arch / arm / plat-mxc / include / mach / mx51.h

diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 1906ee5..c54b5c3 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -140,7 +140,7 @@
 #define MX51_ATA_BASE_ADDR             (MX51_AIPS2_BASE_ADDR + 0xe0000)
 #define MX51_SIM_BASE_ADDR             (MX51_AIPS2_BASE_ADDR + 0xe4000)
 #define MX51_SSI3BASE_ADDR             (MX51_AIPS2_BASE_ADDR + 0xe8000)
-#define MX51_MXC_FEC_BASE_ADDR         (MX51_AIPS2_BASE_ADDR + 0xec000)
+#define MX51_FEC_BASE_ADDR             (MX51_AIPS2_BASE_ADDR + 0xec000)
 #define MX51_TVE_BASE_ADDR             (MX51_AIPS2_BASE_ADDR + 0xf0000)
 #define MX51_VPU_BASE_ADDR             (MX51_AIPS2_BASE_ADDR + 0xf4000)
 #define MX51_SAHARA_BASE_ADDR          (MX51_AIPS2_BASE_ADDR + 0xf8000)
@@ -366,7 +366,7 @@
 #define MX51_MXC_INT_GPU2_IRQ          84
 #define MX51_MXC_INT_GPU2_BUSY         85
 #define MX51_MXC_INT_RESV86            86
-#define MX51_MXC_INT_FEC               87
+#define MX51_INT_FEC                   87
 #define MX51_MXC_INT_OWIRE             88
 #define MX51_MXC_INT_CTI1_TG2          89
 #define MX51_MXC_INT_SJC               90