Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq

[pandora-kernel.git] / arch / arm / mm / proc-v7.S

diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 3185da2..a30e785 100644 (file)
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -58,9 +58,16 @@ ENDPROC(cpu_v7_proc_fin)
  *     to what would be the reset vector.
  *
  *     - loc   - location to jump to for soft reset
+ *
+ *     This code must be executed using a flat identity mapping with
+ *      caches disabled.
  */
        .align  5
 ENTRY(cpu_v7_reset)
+       mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
+       bic     r1, r1, #0x1                    @ ...............m
+       mcr     p15, 0, r1, c1, c0, 0           @ disable MMU
+       isb
        mov     pc, r0
 ENDPROC(cpu_v7_reset)
 
@@ -256,9 +263,6 @@ ENDPROC(cpu_v7_do_resume)
 cpu_resume_l1_flags:
        ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_SMP)
        ALT_UP(.long  PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_UP)
-#else
-#define cpu_v7_do_suspend      0
-#define cpu_v7_do_resume       0
 #endif
 
        __CPUINIT
@@ -280,12 +284,18 @@ cpu_resume_l1_flags:
  */
 __v7_ca5mp_setup:
 __v7_ca9mp_setup:
+       mov     r10, #(1 << 0)                  @ TLB ops broadcasting
+       b       1f
+__v7_ca15mp_setup:
+       mov     r10, #0
+1:
 #ifdef CONFIG_SMP
        ALT_SMP(mrc     p15, 0, r0, c1, c0, 1)
        ALT_UP(mov      r0, #(1 << 6))          @ fake it for UP
        tst     r0, #(1 << 6)                   @ SMP/nAMP mode enabled?
-       orreq   r0, r0, #(1 << 6) | (1 << 0)    @ Enable SMP/nAMP mode and
-       mcreq   p15, 0, r0, c1, c0, 1           @ TLB ops broadcasting
+       orreq   r0, r0, #(1 << 6)               @ Enable SMP/nAMP mode
+       orreq   r0, r0, r10                     @ Enable CPU-specific SMP bits
+       mcreq   p15, 0, r0, c1, c0, 1
 #endif
 __v7_setup:
        adr     r12, __v7_setup_stack           @ the local stack
@@ -464,6 +474,16 @@ __v7_ca9mp_proc_info:
        __v7_proc __v7_ca9mp_setup
        .size   __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
 
+       /*
+        * ARM Ltd. Cortex A15 processor.
+        */
+       .type   __v7_ca15mp_proc_info, #object
+__v7_ca15mp_proc_info:
+       .long   0x410fc0f0
+       .long   0xff0ffff0
+       __v7_proc __v7_ca15mp_setup, hwcaps = HWCAP_IDIV
+       .size   __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
+
        /*
         * Match any ARMv7 processor core.
         */