Merge branch 'for-1111' of git://gitorious.org/smack-next/kernel into for-linus

[pandora-kernel.git] / arch / arm / mach-s5p64x0 / irq-eint.c

diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
index fe7380f..275dc74 100644 (file)
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -17,8 +17,10 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 
+#include <plat/cpu.h>
 #include <plat/regs-irqtype.h>
 #include <plat/gpio-cfg.h>
+#include <plat/pm.h>
 
 #include <mach/regs-gpio.h>
 #include <mach/regs-clock.h>
@@ -67,7 +69,7 @@ static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
        __raw_writel(ctrl, S5P64X0_EINT0CON0);
 
        /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
-       if (0x50000 == (__raw_readl(S5P64X0_SYS_ID) & 0xFF000))
+       if (soc_is_s5p6450())
                s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
        else
                s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
@@ -133,6 +135,7 @@ static int s5p64x0_alloc_gc(void)
        ct->chip.irq_mask = irq_gc_mask_set_bit;
        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
        ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
+       ct->chip.irq_set_wake = s3c_irqext_wake;
        ct->regs.ack = EINT0PEND_OFFSET;
        ct->regs.mask = EINT0MASK_OFFSET;
        irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,