Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input

[pandora-kernel.git] / arch / arm / mach-s3c2440 / mach-osiris.c

diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 1581160..78af766 100644 (file)
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -31,11 +31,11 @@
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 
-#include <asm/arch/regs-serial.h>
+#include <asm/plat-s3c/regs-serial.h>
 #include <asm/arch/regs-gpio.h>
 #include <asm/arch/regs-mem.h>
 #include <asm/arch/regs-lcd.h>
-#include <asm/arch/nand.h>
+#include <asm/plat-s3c/nand.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -166,6 +166,29 @@ static struct mtd_partition osiris_default_nand_part[] = {
        }
 };
 
+static struct mtd_partition osiris_default_nand_part_large[] = {
+       [0] = {
+               .name   = "Boot Agent",
+               .size   = SZ_128K,
+               .offset = 0,
+       },
+       [1] = {
+               .name   = "/boot",
+               .size   = SZ_4M - SZ_128K,
+               .offset = SZ_128K,
+       },
+       [2] = {
+               .name   = "user1",
+               .offset = SZ_4M,
+               .size   = SZ_32M - SZ_4M,
+       },
+       [3] = {
+               .name   = "user2",
+               .offset = SZ_32M,
+               .size   = MTDPART_SIZ_FULL,
+       }
+};
+
 /* the Osiris has 3 selectable slots for nand-flash, the two
  * on-board chip areas, as well as the external slot.
  *
@@ -253,7 +276,21 @@ static unsigned char pm_osiris_ctrl0;
 
 static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
 {
+       unsigned int tmp;
+
        pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
+       tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL;
+
+       /* ensure correct NAND slot is selected on resume */
+       if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0)
+               tmp |= 2;
+
+       __raw_writeb(tmp, OSIRIS_VA_CTRL0);
+
+       /* ensure that an nRESET is not generated on resume. */
+       s3c2410_gpio_setpin(S3C2410_GPA21, 1);
+       s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPA21_OUT);
+
        return 0;
 }
 
@@ -262,6 +299,10 @@ static int osiris_pm_resume(struct sys_device *sd)
        if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
                __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
 
+       __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
+
+       s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPA21_nRSTOUT);
+
        return 0;
 }
 
@@ -271,7 +312,7 @@ static int osiris_pm_resume(struct sys_device *sd)
 #endif
 
 static struct sysdev_class osiris_pm_sysclass = {
-       set_kset_name("mach-osiris"),
+       .name           = "mach-osiris",
        .suspend        = osiris_pm_suspend,
        .resume         = osiris_pm_resume,
 };
@@ -322,14 +363,23 @@ static void __init osiris_map_io(void)
        s3c24xx_init_clocks(0);
        s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
 
+       /* check for the newer revision boards with large page nand */
+
+       if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) {
+               printk(KERN_INFO "OSIRIS-B detected (revision %d)\n",
+                      __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK);
+               osiris_nand_sets[0].partitions = osiris_default_nand_part_large;
+               osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
+       } else {
+               /* write-protect line to the NAND */
+               s3c2410_gpio_setpin(S3C2410_GPA0, 1);
+       }
+
        /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
 
        local_irq_save(flags);
        __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
        local_irq_restore(flags);
-
-       /* write-protect line to the NAND */
-       s3c2410_gpio_setpin(S3C2410_GPA0, 1);
 }
 
 static void __init osiris_init(void)