OMAP2+: add PRM VP functions for checking/clearing VP TX done status

[pandora-kernel.git] / arch / arm / mach-omap2 / vp.h

diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 7ce134f..1ccf741 100644 (file)
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -19,10 +19,30 @@
 
 #include <linux/kernel.h>
 
+struct voltagedomain;
+
+/*
+ * Voltage Processor (VP) identifiers
+ */
+#define OMAP3_VP_VDD_MPU_ID 0
+#define OMAP3_VP_VDD_CORE_ID 1
+#define OMAP4_VP_VDD_CORE_ID 0
+#define OMAP4_VP_VDD_IVA_ID 1
+#define OMAP4_VP_VDD_MPU_ID 2
+
 /* XXX document */
 #define VP_IDLE_TIMEOUT                200
 #define VP_TRANXDONE_TIMEOUT   300
 
+/**
+ * struct omap_vp_ops - per-VP operations
+ * @check_txdone: check for VP transaction done
+ * @clear_txdone: clear VP transaction done status
+ */
+struct omap_vp_ops {
+       u32 (*check_txdone)(u8 vp_id);
+       void (*clear_txdone)(u8 vp_id);
+};
 
 /**
  * struct omap_vp_common_data - register data common to all VDDs
@@ -42,6 +62,7 @@
  * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
  * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
  * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
+ * @prm_mod: PRM module id used for PRM register access
  *
  * XXX It it not necessary to have both a mask and a shift for the same
  *     bitfield - remove one
@@ -54,6 +75,7 @@ struct omap_vp_common_data {
        u32 vpconfig_initvdd;
        u32 vpconfig_forceupdate;
        u32 vpconfig_vpenable;
+       s16 prm_mod;
        u8 vpconfig_erroroffset_shift;
        u8 vpconfig_errorgain_shift;
        u8 vpconfig_initvoltage_shift;
@@ -64,44 +86,31 @@ struct omap_vp_common_data {
        u8 vlimitto_vddmin_shift;
        u8 vlimitto_vddmax_shift;
        u8 vlimitto_timeout_shift;
-};
 
-/**
- * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data
- * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM
- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
- *
- * XXX prm_irqst_reg does not belong here
- * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a
- *     hardware bug
- * XXX This structure is probably not needed
- */
-struct omap_vp_prm_irqst_data {
-       u8 prm_irqst_reg;
-       u32 tranxdone_status;
+       const struct omap_vp_ops *ops;
 };
 
 /**
  * struct omap_vp_instance_data - VP register offsets (per-VDD)
  * @vp_common: pointer to struct omap_vp_common_data * for this SoC
- * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD
  * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
  * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
  * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
  * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
  * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
+ * @id: Unique identifier for VP instance.
  *
  * XXX vp_common is probably not needed since it is per-SoC
  */
 struct omap_vp_instance_data {
        const struct omap_vp_common_data *vp_common;
-       const struct omap_vp_prm_irqst_data *prm_irqst_data;
        u8 vpconfig;
        u8 vstepmin;
        u8 vstepmax;
        u8 vlimitto;
        u8 vstatus;
        u8 voltage;
+       u8 id;
 };
 
 /**
@@ -140,4 +149,11 @@ extern struct omap_vp_instance_data omap4_vp_mpu_data;
 extern struct omap_vp_instance_data omap4_vp_iva_data;
 extern struct omap_vp_instance_data omap4_vp_core_data;
 
+void omap_vp_init(struct voltagedomain *voltdm);
+void omap_vp_enable(struct voltagedomain *voltdm);
+void omap_vp_disable(struct voltagedomain *voltdm);
+unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm);
+int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
+                             unsigned long target_volt);
+
 #endif