OMAP3: remove hardcoded values from the ASM sleep code

[pandora-kernel.git] / arch / arm / mach-omap2 / sleep34xx.S

diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index fb98111..39b9322 100644 (file)
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -34,20 +34,27 @@
 #include "sdrc.h"
 #include "control.h"
 
-#define SDRC_SCRATCHPAD_SEM_V  0xfa00291c
-
-#define PM_PREPWSTST_CORE_P    0x48306AE8
+/*
+ * Registers access definitions
+ */
+#define SDRC_SCRATCHPAD_SEM_OFFS       0xc
+#define SDRC_SCRATCHPAD_SEM_V  OMAP343X_SCRATCHPAD_REGADDR\
+                                       (SDRC_SCRATCHPAD_SEM_OFFS)
+#define PM_PREPWSTST_CORE_P    OMAP3430_PRM_BASE + CORE_MOD +\
+                                       OMAP3430_PM_PREPWSTST
 #define PM_PWSTCTRL_MPU_P      OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL
 #define CM_IDLEST1_CORE_V      OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
 #define CM_IDLEST_CKGEN_V      OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST)
-#define SRAM_BASE_P            0x40200000
-#define CONTROL_STAT           0x480022F0
-#define CONTROL_MEM_RTA_CTRL   (OMAP343X_CTRL_BASE\
-                                       + OMAP36XX_CONTROL_MEM_RTA_CTRL)
-#define SCRATCHPAD_MEM_OFFS    0x310 /* Move this as correct place is
-                                      * available */
-#define SCRATCHPAD_BASE_P      (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
-                                               + SCRATCHPAD_MEM_OFFS)
+#define SRAM_BASE_P            OMAP3_SRAM_PA
+#define CONTROL_STAT           OMAP343X_CTRL_BASE + OMAP343X_CONTROL_STATUS
+#define CONTROL_MEM_RTA_CTRL   (OMAP343X_CTRL_BASE +\
+                                       OMAP36XX_CONTROL_MEM_RTA_CTRL)
+
+/* Move this as correct place is available */
+#define SCRATCHPAD_MEM_OFFS    0x310
+#define SCRATCHPAD_BASE_P      (OMAP343X_CTRL_BASE +\
+                                       OMAP343X_CONTROL_MEM_WKUP +\
+                                       SCRATCHPAD_MEM_OFFS)
 #define SDRC_POWER_V           OMAP34XX_SDRC_REGADDR(SDRC_POWER)
 #define SDRC_SYSCONFIG_P       (OMAP343X_SDRC_BASE + SDRC_SYSCONFIG)
 #define SDRC_MR_0_P            (OMAP343X_SDRC_BASE + SDRC_MR_0)