Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci

[pandora-kernel.git] / arch / arm / mach-omap2 / hsmmc.c

diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 2dc002a..f4a1020 100644 (file)
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -129,15 +129,11 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
         * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
         * card with Vcc regulator (from twl4030 or whatever).  OMAP has both
         * 1.8V and 3.0V modes, controlled by the PBIAS register.
-        *
-        * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
-        * is most naturally TWL VSIM; those pins also use PBIAS.
-        *
-        * FIXME handle VMMC1A as needed ...
         */
        reg = omap4_ctrl_pad_readl(control_pbias_offset);
        reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-               OMAP4_MMC1_PWRDNZ_MASK);
+               OMAP4_MMC1_PWRDNZ_MASK |
+               OMAP4_MMC1_PBIASLITE_VMODE_MASK);
        omap4_ctrl_pad_writel(reg, control_pbias_offset);
 }
 
@@ -172,12 +168,6 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
                        reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
                        omap4_ctrl_pad_writel(reg, control_pbias_offset);
                }
-       } else {
-               reg = omap4_ctrl_pad_readl(control_pbias_offset);
-               reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-                       OMAP4_MMC1_PWRDNZ_MASK |
-                       OMAP4_MMC1_PBIASLITE_VMODE_MASK);
-               omap4_ctrl_pad_writel(reg, control_pbias_offset);
        }
 }
 
@@ -409,31 +399,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
        return 0;
 }
 
-static struct omap_device_pm_latency omap_hsmmc_latency[] = {
-       [0] = {
-               .deactivate_func = omap_device_idle_hwmods,
-               .activate_func   = omap_device_enable_hwmods,
-               .flags           = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
-       },
-       /*
-        * XXX There should also be an entry here to power off/on the
-        * MMC regulators/PBIAS cells, etc.
-        */
-};
-
 #define MAX_OMAP_MMC_HWMOD_NAME_LEN            16
 
 void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
 {
        struct omap_hwmod *oh;
        struct platform_device *pdev;
-       struct omap_device_pm_latency *ohl;
        char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
        struct omap_mmc_platform_data *mmc_data;
        struct omap_mmc_dev_attr *mmc_dev_attr;
        char *name;
        int l;
-       int ohl_cnt = 0;
 
        mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
        if (!mmc_data) {
@@ -448,8 +424,6 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
        omap_hsmmc_mux(mmc_data, (ctrl_nr - 1));
 
        name = "omap_hsmmc";
-       ohl = omap_hsmmc_latency;
-       ohl_cnt = ARRAY_SIZE(omap_hsmmc_latency);
 
        l = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
                     "mmc%d", ctrl_nr);
@@ -468,7 +442,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
        }
 
        pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data,
-               sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false);
+               sizeof(struct omap_mmc_platform_data), NULL, 0, false);
        if (IS_ERR(pdev)) {
                WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name);
                kfree(mmc_data->slots[0].name);
@@ -505,7 +479,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
                        OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK);
                reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK |
                        OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK);
-               reg |= (OMAP4_USBC1_DR0_SPEEDCTRL_MASK|
+               reg |= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK |
                        OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK |
                        OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK);
                omap4_ctrl_pad_writel(reg, control_mmc1);