static int omap3_noncore_dpll_enable(struct clk *clk)
{
int r;
- long rate;
struct dpll_data *dd;
+ u32 rate;
if (clk == &dpll3_ck)
return -EINVAL;
if (!dd)
return -EINVAL;
- if (clk->rate == dd->bypass_clk->rate)
+ rate = omap2_get_dpll_rate(clk);
+
+ if (dd->bypass_clk->rate == rate)
r = _omap3_noncore_dpll_bypass(clk);
else
r = _omap3_noncore_dpll_lock(clk);
if (!r)
- clk->rate = rate;
+ clk->rate = omap2_get_dpll_rate(clk);
return r;
}
ret = omap3_noncore_dpll_program(clk, dd->last_rounded_m,
dd->last_rounded_n, freqsel);
+ if (!ret)
+ clk->rate = rate;
+
}
omap3_dpll_recalc(clk);
.clk_round_rate = omap2_clk_round_rate,
.clk_set_rate = omap2_clk_set_rate,
.clk_set_parent = omap2_clk_set_parent,
+ .clk_get_parent = omap2_clk_get_parent,
.clk_disable_unused = omap2_clk_disable_unused,
};