Merge branch 'linus' into x86/urgent

[pandora-kernel.git] / arch / arm / mach-omap2 / clock24xx.c

diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 615b511..aa56787 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -1,15 +1,15 @@
 /*
  *  linux/arch/arm/mach-omap2/clock.c
  *
- *  Copyright (C) 2005 Texas Instruments Inc.
- *  Richard Woodruff <r-woodruff2@ti.com>
- *  Created for OMAP2.
+ *  Copyright (C) 2005-2008 Texas Instruments, Inc.
+ *  Copyright (C) 2004-2008 Nokia Corporation
  *
- *  Cleaned up and modified to use omap shared clock framework by
- *  Tony Lindgren <tony@atomide.com>
+ *  Contacts:
+ *  Richard Woodruff <r-woodruff2@ti.com>
+ *  Paul Walmsley
  *
- *  Based on omap1 clock.c, Copyright (C) 2004 - 2005 Nokia corporation
- *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *  Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
+ *  Gordon McNutt and RidgeRun, Inc.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -60,6 +60,21 @@ static struct clk *sclk;
  * Omap24xx specific clock functions
  *-------------------------------------------------------------------------*/
 
+/* This actually returns the rate of core_ck, not dpll_ck. */
+static u32 omap2_get_dpll_rate_24xx(struct clk *tclk)
+{
+       long long dpll_clk;
+       u8 amult;
+
+       dpll_clk = omap2_get_dpll_rate(tclk);
+
+       amult = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+       amult &= OMAP24XX_CORE_CLK_SRC_MASK;
+       dpll_clk *= amult;
+
+       return dpll_clk;
+}
+
 static int omap2_enable_osc_ck(struct clk *clk)
 {
        u32 pcc;
@@ -94,21 +109,6 @@ static void omap2_sys_clk_recalc(struct clk * clk)
 }
 #endif /* OLD_CK */
 
-/* This actually returns the rate of core_ck, not dpll_ck. */
-static u32 omap2_get_dpll_rate_24xx(struct clk *tclk)
-{
-       long long dpll_clk;
-       u8 amult;
-
-       dpll_clk = omap2_get_dpll_rate(tclk);
-
-       amult = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
-       amult &= OMAP24XX_CORE_CLK_SRC_MASK;
-       dpll_clk *= amult;
-
-       return dpll_clk;
-}
-
 /* Enable an APLL if off */
 static int omap2_clk_fixed_enable(struct clk *clk)
 {
@@ -154,7 +154,7 @@ static void omap2_clk_fixed_disable(struct clk *clk)
  * Uses the current prcm set to tell if a rate is valid.
  * You can go slower, but not faster within a given rate set.
  */
-static u32 omap2_dpll_round_rate(unsigned long target_rate)
+long omap2_dpllcore_round_rate(unsigned long target_rate)
 {
        u32 high, low, core_clk_src;
 
@@ -183,14 +183,14 @@ static u32 omap2_dpll_round_rate(unsigned long target_rate)
 
 }
 
-static void omap2_dpll_recalc(struct clk *clk)
+static void omap2_dpllcore_recalc(struct clk *clk)
 {
        clk->rate = omap2_get_dpll_rate_24xx(clk);
 
        propagate_rate(clk);
 }
 
-static int omap2_reprogram_dpll(struct clk *clk, unsigned long rate)
+static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
 {
        u32 cur_rate, low, mult, div, valid_rate, done_rate;
        u32 bypass = 0;
@@ -209,7 +209,7 @@ static int omap2_reprogram_dpll(struct clk *clk, unsigned long rate)
        } else if ((rate == (cur_rate * 2)) && (mult == 1)) {
                omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1);
        } else if (rate != cur_rate) {
-               valid_rate = omap2_dpll_round_rate(rate);
+               valid_rate = omap2_dpllcore_round_rate(rate);
                if (valid_rate != rate)
                        goto dpll_exit;
 
@@ -256,7 +256,7 @@ static int omap2_reprogram_dpll(struct clk *clk, unsigned long rate)
                omap2_init_memory_params(omap2_dll_force_needed());
                omap2_reprogram_sdrc(done_rate, 0);
        }
-       omap2_dpll_recalc(&dpll_ck);
+       omap2_dpllcore_recalc(&dpll_ck);
        ret = 0;
 
 dpll_exit:
@@ -333,7 +333,7 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
 
        if (!found_speed) {
                printk(KERN_INFO "Could not set MPU rate to %luMHz\n",
-        rate / 1000000);
+                      rate / 1000000);
                return -EINVAL;
        }
 
@@ -383,7 +383,7 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
 
                local_irq_restore(flags);
        }
-       omap2_dpll_recalc(&dpll_ck);
+       omap2_dpllcore_recalc(&dpll_ck);
 
        return 0;
 }