#define MSM8X60_QGIC_CPU_PHYS 0x02081000
#define MSM8X60_QGIC_CPU_SIZE SZ_4K
-#define MSM_ACC_BASE IOMEM(0xF0002000)
-#define MSM_ACC_PHYS 0x02001000
-#define MSM_ACC_SIZE SZ_4K
-
-#define MSM_GCC_BASE IOMEM(0xF0003000)
-#define MSM_GCC_PHYS 0x02082000
-#define MSM_GCC_SIZE SZ_4K
-
#define MSM_TLMM_BASE IOMEM(0xF0004000)
#define MSM_TLMM_PHYS 0x00800000
#define MSM_TLMM_SIZE SZ_16K
-#define MSM_SHARED_RAM_BASE IOMEM(0xF0100000)
-#define MSM_SHARED_RAM_SIZE SZ_1M
-
#define MSM8X60_TMR_PHYS 0x02000000
#define MSM8X60_TMR_SIZE SZ_4K