#include <linux/list.h>
#include <asm/mach/irq.h>
#include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
#include <asm/mach-types.h>
static u32 iop33x_mask0;
static u32 iop33x_mask1;
-static inline void intctl0_write(u32 val)
+static void intctl0_write(u32 val)
{
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
- iop3xx_cp6_disable();
}
-static inline void intctl1_write(u32 val)
+static void intctl1_write(u32 val)
{
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));
- iop3xx_cp6_disable();
}
-static inline void intstr0_write(u32 val)
+static void intstr0_write(u32 val)
{
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));
- iop3xx_cp6_disable();
}
-static inline void intstr1_write(u32 val)
+static void intstr1_write(u32 val)
{
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));
- iop3xx_cp6_disable();
}
-static inline void intbase_write(u32 val)
+static void intbase_write(u32 val)
{
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
- iop3xx_cp6_disable();
}
-static inline void intsize_write(u32 val)
+static void intsize_write(u32 val)
{
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));
- iop3xx_cp6_disable();
}
static void
-iop33x_irq_mask1 (unsigned int irq)
+iop33x_irq_mask1 (struct irq_data *d)
{
- iop33x_mask0 &= ~(1 << irq);
+ iop33x_mask0 &= ~(1 << d->irq);
intctl0_write(iop33x_mask0);
}
static void
-iop33x_irq_mask2 (unsigned int irq)
+iop33x_irq_mask2 (struct irq_data *d)
{
- iop33x_mask1 &= ~(1 << (irq - 32));
+ iop33x_mask1 &= ~(1 << (d->irq - 32));
intctl1_write(iop33x_mask1);
}
static void
-iop33x_irq_unmask1(unsigned int irq)
+iop33x_irq_unmask1(struct irq_data *d)
{
- iop33x_mask0 |= 1 << irq;
+ iop33x_mask0 |= 1 << d->irq;
intctl0_write(iop33x_mask0);
}
static void
-iop33x_irq_unmask2(unsigned int irq)
+iop33x_irq_unmask2(struct irq_data *d)
{
- iop33x_mask1 |= (1 << (irq - 32));
+ iop33x_mask1 |= (1 << (d->irq - 32));
intctl1_write(iop33x_mask1);
}
struct irq_chip iop33x_irqchip1 = {
- .name = "IOP33x-1",
- .ack = iop33x_irq_mask1,
- .mask = iop33x_irq_mask1,
- .unmask = iop33x_irq_unmask1,
+ .name = "IOP33x-1",
+ .irq_ack = iop33x_irq_mask1,
+ .irq_mask = iop33x_irq_mask1,
+ .irq_unmask = iop33x_irq_unmask1,
};
struct irq_chip iop33x_irqchip2 = {
- .name = "IOP33x-2",
- .ack = iop33x_irq_mask2,
- .mask = iop33x_irq_mask2,
- .unmask = iop33x_irq_unmask2,
+ .name = "IOP33x-2",
+ .irq_ack = iop33x_irq_mask2,
+ .irq_mask = iop33x_irq_mask2,
+ .irq_unmask = iop33x_irq_unmask2,
};
void __init iop33x_init_irq(void)