Davinci: support LPSC SwRstDisable state

[pandora-kernel.git] / arch / arm / mach-davinci / psc.c

diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 04a3cb7..d7cb438 100644 (file)
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -25,17 +25,6 @@
 #include <mach/cputype.h>
 #include <mach/psc.h>
 
-/* PSC register offsets */
-#define EPCPR          0x070
-#define PTCMD          0x120
-#define PTSTAT         0x128
-#define PDSTAT         0x200
-#define PDCTL1         0x304
-#define MDSTAT         0x800
-#define MDCTL          0xA00
-
-#define MDSTAT_STATE_MASK 0x1f
-
 /* Return nonzero iff the domain's clock is active */
 int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 {
@@ -58,12 +47,11 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 
 /* Enable or disable a PSC domain */
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
-               unsigned int id, char enable)
+               unsigned int id, u32 next_state)
 {
        u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
        void __iomem *psc_base;
        struct davinci_soc_info *soc_info = &davinci_soc_info;
-       u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */
 
        if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
                pr_warning("PSC: Bad psc data: 0x%x[%d]\n",