ARM: dts: Grammar /that will/it will/
[pandora-kernel.git] / arch / arm / boot / dts / omap5.dtsi
index 19155bb..f8c9855 100644 (file)
@@ -93,7 +93,7 @@
        };
 
        /*
-        * The soc node represents the soc top level view. It is uses for IPs
+        * The soc node represents the soc top level view. It is used for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
         */
        soc {
        /*
         * XXX: Use a flat representation of the OMAP3 interconnect.
         * The real OMAP interconnect network is quite complex.
-        * Since that will not bring real advantage to represent that in DT for
+        * Since it will not bring real advantage to represent that in DT for
         * the moment, just use a fake OCP bus entry to represent the whole bus
         * hierarchy.
         */
                        pinctrl-single,function-mask = <0x7fff>;
                };
 
+               omap5_padconf_global: tisyscon@4a002da0 {
+                       compatible = "syscon";
+                       reg = <0x4A002da0 0xec>;
+               };
+
+               pbias_regulator: pbias_regulator {
+                       compatible = "ti,pbias-omap";
+                       reg = <0x60 0x4>;
+                       syscon = <&omap5_padconf_global>;
+                       pbias_mmc_reg: pbias_mmc_omap5 {
+                               regulator-name = "pbias_mmc_omap5";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3000000>;
+                       };
+               };
+
                sdma: dma-controller@4a056000 {
                        compatible = "ti,omap4430-sdma";
                        reg = <0x4a056000 0x1000>;
                        ti,needs-special-reset;
                        dmas = <&sdma 61>, <&sdma 62>;
                        dma-names = "tx", "rx";
+                       pbias-supply = <&pbias_mmc_reg>;
                };
 
                mmc2: mmc@480b4000 {
                                      <0x4a084c00 0x40>;
                                reg-names = "phy_rx", "phy_tx", "pll_ctrl";
                                ctrl-module = <&omap_control_usb3phy>;
+                               clocks = <&usb_phy_cm_clk32k>,
+                                        <&sys_clkin>,
+                                        <&usb_otg_ss_refclk960m>;
+                               clock-names =   "wkupclk",
+                                               "sysclk",
+                                               "refclk";
                                #phy-cells = <0>;
                        };
                };