ARM: 8265/1: dts: exynos4: Add nodes for L2 cache controller

[pandora-kernel.git] / arch / arm / boot / dts / exynos4x12.dtsi

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 2e9f1f7..8bc97c4 100644 (file)
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -54,6 +54,20 @@
                reg = <0x10023CA0 0x20>;
        };
 
+       l2c: l2-cache-controller@10502000 {
+               compatible = "arm,pl310-cache";
+               reg = <0x10502000 0x1000>;
+               cache-unified;
+               cache-level = <2>;
+               arm,tag-latency = <2 2 1>;
+               arm,data-latency = <3 2 1>;
+               arm,double-linefill = <1>;
+               arm,double-linefill-incr = <0>;
+               arm,double-linefill-wrap = <1>;
+               arm,prefetch-drop = <1>;
+               arm,prefetch-offset = <7>;
+       };
+
        clock: clock-controller@10030000 {
                compatible = "samsung,exynos4412-clock";
                reg = <0x10030000 0x20000>;
@@ -108,13 +122,14 @@
 
        adc: adc@126C0000 {
                compatible = "samsung,exynos-adc-v1";
-               reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+               reg = <0x126C0000 0x100>;
                interrupt-parent = <&combiner>;
                interrupts = <10 3>;
                clocks = <&clock CLK_TSADC>;
                clock-names = "adc";
                #io-channel-cells = <1>;
                io-channel-ranges;
+               samsung,syscon-phandle = <&pmu_system_controller>;
                status = "disabled";
        };